參數(shù)資料
型號: R5F212BASNFA
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP48
封裝: 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-48
文件頁數(shù): 39/138頁
文件大小: 492K
代理商: R5F212BASNFA
220
4317K–AVR–03/2013
AT90PWM2/3/2B/3B
The following code example shows a simple EUSART receive function.
Note:
The example code assumes that the part specific header file is included.
For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI”
instructions must be replaced with instructions that allow access to extended I/O. Typically “LDS”
and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.
19.5.3
Receiving 17 Data Bit Frames
In this configuration the seventeenth bit shoud be read from the RXB8 bit register, the rest of the
most significant bits (9, 10, 11, 12, 13, 14, 15 and 16) should be read from the EUDR register,
before the low byte of the character is read from UDR.
19.5.4
Receive Complete Flag and Interrupt
The EUSART Receiver has the same USART flag that indicates the Receiver state.
19.5.5
Receiver Error Flags
When the EUSART is not configured in Manchester mode, the EUSART has the three same
errors flags as standard mode: Frame Error (FE), Data OverRun (DOR) and Parity Error (UPE).
All can be accessed by reading UCSRA. (See “Receiver Error Flags” in USART section).
When the EUSART is configured in Machester mode, the EUSART has two errors flags: Data
OverRun (DOR), and Manchester framing error (FEM bit of EUCSRC).
TABLE 3.
Assembly Code Example(1)
EUSART_Receive:
; Wait for data to be received
sbis
UCSRA, RXC
rjmp
EUSART_Receive
; Get MSB (r15), LSB (r16)
lds
r15, EUDR
lds
r16, UDR
ret
C Code Example
(1)
unsigned int
EUSART_Receive( void )
{
unsigneg int rx_data
/* Wait for data to be received */
while
( !(UCSRA & (1<<RXC)) )
;
/* Get and return received data from buffer */
rx_data=EUDR;
rx_data=rx_data<<8+UDR;
return
rx_data;
}
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