參數(shù)資料
型號: R3F10031NSP
元件分類: 微控制器/微處理器
英文描述: FLASH, 8 MHz, MICROCONTROLLER, PDSO24
封裝: 5.30 X 10.10 MM, 0.80 MM PITCH, PLASTIC, SSOP-24
文件頁數(shù): 13/30頁
文件大?。?/td> 229K
代理商: R3F10031NSP
R38F1 Group, R38F2 Group, R38F3 Group
3. Memory
REJ03B0226-0001 Rev.0.01
Nov 21, 2007
Page 20 of 28
Under development Preliminary specification
Notice: This is not a final specification. Some parametric limits are subject to change.
3.
Memory
3.1
Memory Allocation
The SFR area in 0 page contains the control registers for peripheral functions.
RAM is used for data storage and for a stack area of subroutine calls and interrupts.
The last 2 bytes of ROM are reserved for device testing and the rest is a user area. The user area includes the
function set ROM area.
The interrupt vector area (addresses FFDCh to FFFDh) contains reset and interrupt vectors.
0 page (addresses 0000h to 00FFh) is an area that can be assessed with 2 words in by using zero addressing mode.
The special page (addresses FF00h to FFFFh) is an area that can be accessed with 2 words by using special page
addressing mode.
1 page (addresses 0100h to 01FFh) is an area that can also be used as stacks.
3.2
Function Set ROM Area (FSROM0 to FSROM2)
FSROM0 to FSROM2 area (addresses FFD9h to FFDBh) are used to set the modes of peripheral functions and are
allocated in the user ROM. By setting values to these areas, the operating modes of the individual peripheral
functions are set when the MCU is reset.
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