參數(shù)資料
型號: R3F10031NSP
元件分類: 微控制器/微處理器
英文描述: FLASH, 8 MHz, MICROCONTROLLER, PDSO24
封裝: 5.30 X 10.10 MM, 0.80 MM PITCH, PLASTIC, SSOP-24
文件頁數(shù): 12/30頁
文件大?。?/td> 229K
代理商: R3F10031NSP
R38F1 Group, R38F2 Group, R38F3 Group
1. Overview
REJ03B0226-0001 Rev.0.01
Nov 21, 2007
Page 2 of 28
Under development Preliminary specification
Notice: This is not a final specification. Some parametric limits are subject to change.
1.1.2
Specifications
Tables 1.1 and 1.2 outline the Specifications for R38F1 Group, R38F2 Group, and R38F3 Groups.
Table 1.1
Specifications for R38F1, R38F2, and R38F3 Groups (1)
Item
Function
Specification
CPU
Central processing
unit
740 Series core
Number of fundamental instructions: 71
Minimum instruction execution time:
0.25
s (f(XIN) = 8 MHz, divided-by-1)
Operating mode: Single-chip mode (address space: 1 Mbyte)
Memory
ROM, RAM
Refer to the product list for each group.
Voltage
Detection
Low-voltage detection
circuit
On-chip
Power-on reset
On-chip
I/O Ports
Programable
I/O
R38F3
Group
CMOS output-only: 1
N-channel open drain output-only: 1
CMOS I/O: 19, selectable pull-up register
R38F2
Group
CMOS output-only: 1
N-channel open drain output-only: 1
CMOS I/O: 15, selectable pull-up register
R38F1
Group
CMOS output-only: 1
N-channel open drain output-only: 1
CMOS I/O: 11, selectable pull-up register
Clock
Clock generation
circuits
3 circuits: XIN clock oscillation circuit (with on-chip feedback resistor),
On-chip oscillator (high-speed, low-speed),
XCIN clock oscillation circuit (32 kHz, with on-chip feedback resistor)
Oscillation stop detection: XIN clock oscillation stop detection function
Frequency divider circuit: Division ratio selectable from 1, 2, 4, and 8
Low-power-consumption modes: Wait mode, stop mode
Interrupts
External: 4 sources, Internal: 8 sources, Software: 1 source
Watchdog Timer
16 bits × 1 channel
Timer
Timer 1
8 bits × 1 (with 8-bit prescaler shared with timer 1 and timer 2)
Timer mode (period timer)
Timer 2
8 bits × 1 (with 8-bit prescaler shared with timer 1 and timer 2)
Timer mode (period timer, inverted level output per cycle)
Timer A
16 bits × 1 (with timer A (high-order, low-order) latch)
Timer mode (period timer)
Timer C
15 bits × 1
Output compare
3 channels (timer A used)
Input capture
1 channel (timer A used)
Serial
Interface
Serial I/O1
Clock synchronous serial I/O/UART I/O × 1
A/D
Converter
R38F3 Group
10-bit resolution × 8 channels
R38F2 Group
10-bit resolution × 6 channels
R38F1 Group
10-bit resolution × 4 channels
Flash Memory
Programming and erasure voltage: VCC = 5.0 V
Programming and erasure endurance: 10 times
Programming security: ROM code protection
Operating mode of flash memory: 1 mode (standard serial I/O)
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