參數(shù)資料
型號(hào): R2051K01
廠商: RICOH COMPANY LTD
元件分類: 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述: 0 TIMER(S), REAL TIME CLOCK, QCC12
封裝: 2 X 2 MM, 0.85 MM PITCH, ULTRA-COMPACT, FFP, 12 PIN
文件頁數(shù): 8/53頁
文件大?。?/td> 343K
代理商: R2051K01
R2051 Series
12345
Rev.1.04
- 16 -
(6) CTFG
Periodic Interrupt Flag Bit
CTFG
Description
0
Periodic interrupt output = “H”
(Default)
1
Periodic interrupt output = “L”
The CTFG bit is set to 1 when the periodic interrupt signals are output from the /INTR pin (“L”). The CTFG bit
accepts only the writing of 0 in the level mode, which disables (“H”) the /INTR pin until it is enabled (“L”) again
in the next interrupt cycle. Conversely, setting the CTFG bit to 1 causes no event.
(7) WAFG,DAFG
Alarm_W Flag Bit and Alarm_D Flag Bit
WAFG,DAFG
Description
0
Indicating a mismatch between current time and preset alarm time
(Default)
1
Indicating a match between current time and preset alarm time
The WAFG and DAFG bits are valid only when the WALE and DALE have the setting of 1, which is caused
approximately 61
s after any match between current time and preset alarm time specified by the Alarm_W
registers and the Alarm_D registers. The WAFG (DAFG) bit accepts only the writing of 0. /INTR pin outputs
off (“H”) when this bit is set to 0. And /INTR pin outputs “L” again at the next preset alarm time.
Conversely,
setting the WAFG and DAFG bits to 1 causes no event. The WAFG and DAFG bits will have the reading of 0
when the alarm interrupt circuit is disabled with the WALE and DALE bits set to 0. The settings of the WAFG
and DAFG bits are synchronized with the output of the /INTR pin as shown in the timing chart below.
/INTR Pin
Writing of 0 to
WAFG(DAFG) bit
WAFG(DAFG) Bit
(Match between
current time and
preset alarm time)
Approx. 61
s
Approx. 61
s
Writing of 0 to
WAFG(DAFG) bit
(Match between
current time and
preset alarm time)
(Match between
current time and
preset alarm time)
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