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| 型號： | PWL6030B1AECMRR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA187 |
| 封裝： | 7 X 7 MM, 0.40 MM PITCH, GREEN, FCBGA-187 |
| 文件頁數(shù)： | 72/97頁 |
| 文件大小： | 937K |
| 代理商： | PWL6030B1AECMRR |
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SWCS045-016
VBUS_IADP_SRC
VBUS
VADP_PRB
Time interval
measurement
Upper
limit
Lower
limit
VBUS_IADP_SINK
ADP probing and sensing
control
32.768-kHz crystal clock
ADP interrupt
ADP_MODE[1:0]
T_ADP_HIGH[7:0]
T_ADP_LOW[7:0]
T_ADP_RISE[7:0]
VADP_SNS
SWCS045B
– SEPTEMBER 2010 – REVISED JUNE 2011
ADP on VBUS Line
The ADP feature allows the device to detect when a remote device is attached or detached. The ADP detects the
change in VBUS capacitance that occurs when two devices are attached or detached. The capacitance is
detected by first discharging (VBUS_IADP_SINK) the VBUS line and then measuring the time it takes for VBUS
to charge to a VADP_PRB voltage level with a VBUS_IADP_SRC current source. The change in the capacitance
is detected by looking for a change in the T_ADP_RISE charge time. This operation is called ADP probing, which
is allowed only for an A-device.
If an A-device is attached to a B-device, and both support ADP features, the A-device performs ADP probing and
the B-device performs ADP sensing. During ADP sensing, the B-device searches for ADP probing activity on the
VBUS line. If ADP probing activity is detected, the B-device determines that the A-device is still attached.
As shown in Figure 17, the ADP module has timing register bits (T_ADP_HIGH, T_ADP_LOW, T_ADP_RISE),
control logic, a current source (VBUS_IADP_SRC), a current sink (VBUS_IADP_SINK), and two comparators:
ADP probing (VADP_PRB) and ADP sensing (VADP_SNS).
Figure 17. Attach Detection Protocol Scheme
Figure 18 shows the ADP timing diagram.
74
Copyright
2010–2011, Texas Instruments Incorporated
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