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參數(shù)資料
| 型號： | PWL6030B1AECMRR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA187 |
| 封裝： | 7 X 7 MM, 0.40 MM PITCH, GREEN, FCBGA-187 |
| 文件頁數(shù)： | 29/97頁 |
| 文件大?。?/td> | 937K |
| 代理商： | PWL6030B1AECMRR |
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SWCS045B
– SEPTEMBER 2010 – REVISED JUNE 2011
low-level sensitive; it indicates that an alarm interrupt occurred. This interrupt is disabled by writing 1.
NOTE
Both alarm (RTC_ALARM) and timer (RTC_PERIOD) interrupts can occur at the same time.
Both the primary handler and RTC IT_ALARM/IT_TIMER bits must be cleared; otherwise, they
hide new interrupt events.
Only the RTC alarm (RTC_ALARM) can wake up the TWL6030 device (see the STRT_ON_RTC
bit in the PHOENIX_START_CONDITION register).
CLOCKS
The TWL6030 device is independent of any high-frequency system clock: It provides only a 32-kHz clock to the
platform (see Figure 5). The oscillator can use an external crystal unit to generate the clock or use an external
32-kHz oscillator, in which case the internal oscillator module is bypassed.
To provide a high-performance, 32-kHz clock for the audio device (TWL6040), a dedicated output buffer is
implemented on the CLK32KAUDIO ball. This audio buffer uses the VRTC regulator as an input supply source.
The CLK32KAUDIO clock might not always be available, and its associated register configuration depends on
the platform requirements.
Higher frequencies are required for the different functions of the TWL6030 device and are generated from an
internal 6-MHz resistor-capacitor (RC) oscillator.
Copyright
2010–2011, Texas Instruments Incorporated
35
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