- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄296883 > PUMA2S1000M-35 32K X 32 MULTI DEVICE SRAM MODULE, 35 ns, CHMA66 PDF資料下載
參數(shù)資料
| 型號(hào)： | PUMA2S1000M-35 |
| 元件分類： | SRAM |
| 英文描述： | 32K X 32 MULTI DEVICE SRAM MODULE, 35 ns, CHMA66 |
| 封裝： | CERAMIC, MODULE, PGA-66 |
| 文件頁數(shù)： | 3/9頁 |
| 文件大?。?/td> | 555K |
| 代理商： | PUMA2S1000M-35 |
PUMA 2S1000 - 25/35/45
ISSUE 4.5 : August 2002
3
1 = V
IH,0 = VIL,
X = Don't Care
Note: CS is accessed through CS1~4, and WE is accessed through WE1~4. For correct operation, CS1~4 must
operate simultaneously for 32 bit operation, in pairs for 16 bit operation, or singly for 8 bit operation. WE1~4
must also be operated in the same manner.
Mode
CS
OE
WE
V
CC Current
I/O Pin Reference Cycle
Not Selected
1
X
I
SB,ISB1,ISB2
High Z
Power Down
OutputDisable
0
1
I
CC
High Z
Read
0
1
I
CC
D
OUT
Read Cycle
Write
0
X
0
I
CC
D
IN
Write Cycle
Operating Modes
The Table below shows the logic inputs required to control the operating modes of each of the SRAMs on the
PUMA 2S1000.
Low V
cc Data Retention Characteristics - L Version Only (VCC = 5.0V±10%, TA=-55°C to +125°C)
Parameter
Symbol
Test Condition
min
typ
max
Unit
V
CC for Data Retention
V
DR
CS
≥V
CC-0.2V, VIN≥0V
2.0
-
5.5
V
Data Retention Current
I
CCDR1
V
CC=2.0V, CS≥VCC-0.2V, VIN≥0V
--
8
mA
-L Version
I
CCDR2
As above
-
2.2
mA
Chip Deselect to Data Retention Time
t
CDR
See Retention Waveform
0-
-
ns
Operation Recovery Time
t
R
See Retention Waveform
t
RC
--
ns
AC Test Conditions
Output Load
* Input pulse levels: 0V to 3.0V
* Input rise and fall times: 3ns
* Input and Output timing reference levels: 1.5V
* Output load: see diagram
* V
cc=5V±10%
166
30pF
I/O Pin
1.76V
Note: CS above is accessed through CS1~4.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PUMA67E4001A-15E | 128K X 32 EEPROM 5V MODULE, 150 ns, CQMA68 |
| PUMA67S4000MB-55 | 512K X 8 MULTI DEVICE SRAM MODULE, 55 ns, CQCC68 |
| PUMA68FV32006M-90 | 1M X 32 FLASH 3.3V PROM MODULE, 90 ns, PQMA68 |
| PUMA77S4000LI-020 | 128K X 32 MULTI DEVICE SRAM MODULE, 20 ns, CDSO68 |
| PUMA77S4000L-025 | 128K X 32 MULTI DEVICE SRAM MODULE, 25 ns, CQFP68 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PUMA2S1000M-45 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SRAM|32KX32|CMOS|PGA|66PIN|CERAMIC |
| PUMA2S1000M-55 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x32 SRAM Module |
| PUMA2S1000M-70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x32 SRAM Module |
| PUMA2S1000M-85 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x32 SRAM Module |
| PUMA2S1000MB-020 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SRAM|32KX32|CMOS|PGA|66PIN|CERAMIC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。