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SWCS046C – MARCH 2010 – REVISED JUNE 2010
Bits
Field Name
Description
Type
Reset
7:4
Reserved
Reserved bit
RO
0x0
R returns
0s
3:2
SEL
Supply voltage (EEPROM bits):
RW
See (1)
SEL[1:0] = 00 : 1.8 V
SEL[1:0] = 01 : 2.6 V
SEL[1:0] = 10 : 2.8 V
SEL[1:0] = 11 : 2.85 V
1:0
ST
Supply state (EEPROM bits):
RW
0x0
ST[1:0] = 00 : Off
ST[1:0] = 01 : On high power (ACTIVE)
ST[1:0] = 10 : Off
ST[1:0] = 11 : On low power (SLEEP)
(1)
The reset value for this field varies with boot mode selection and the processor support. Please refer to the corresponding processor
user guide to find the correct default value.
Table 58. Therm_REG
Address Offset
0x38
Physical Address
Instance
Description
Thermal control register
Type
RW
7
6
5
4
3
2
1
0
Reserved
THERM_HD
THERM_TS
THERM_HDSEL
RSVD1
THERM_STATE
Bits
Field Name
Description
Type
Reset
7:6
Reserved
Reserved bit
RO
0x0
R returns
0s
5
THERM_HD
Hot die detector output:
RO
0
when 0: the hot die threshold is not reached
when 1: the hot die threshold is reached
4
THERM_TS
Thermal shutdown detector output:
RO
0
when 0: the thermal shutdown threshold is not reached
when 1: the thermal shutdown threshold is reached
3:2
THERM_HDSEL
Temperature selection for Hot Die detector:
RW
0x3
when 00: Low temperature threshold
…
when 11: High temperature threshold
1
RSVD1
Reserved bit
RW
0
THERM_STATE
Thermal shutdown module enable signal:
RW
1
when 0: thermal shutdown module is disable
when 1: thermal shutdown module is enable
Table 59. BBCH_REG
Address Offset
0x39
Physical Address
Instance
Description
Back-up battery charger control register
Type
RW
Copyright 2010, Texas Instruments Incorporated
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