參數(shù)資料
型號： PTPS659107A1RSL
廠商： TEXAS INSTRUMENTS INC
元件分類： 電源管理
英文描述： POWER SUPPLY SUPPORT CKT, PQCC48
封裝： 6 X 6 MM, 1 MM HEIGHT, GREEN, PLASTIC,VQFN-48
文件頁數(shù)： 68/89頁
文件大?。?/td> 941K
代理商： PTPS659107A1RSL
PRODUCTPREVIEW
SWCS046C – MARCH 2010 – REVISED JUNE 2010
www.ti.com
Bits
Field Name
Description
Type
Reset
7:4
Reserved
Reserved bit
RO
0x0
R returns
0s
3:2
SEL
Supply voltage (EEPROM bits):
RW
See (1)
SEL[1:0] = 00 : 1.8 V
SEL[1:0] = 01 : 2.8 V
SEL[1:0] = 10 : 3.0 V
SEL[1:0] = 11 : 3.3 V
1:0
ST
Supply state (EEPROM bits):
RW
0x0
ST[1:0] = 00: Off
ST[1:0] = 01: On high power (ACTIVE)
ST[1:0] = 10: Off
ST[1:0] = 11: On low power (SLEEP)
(1)
The reset value for this field varies with boot mode selection and the processor support. Please refer to the corresponding processor
user guide to find the correct default value.
Table 56. VPLL_REG
Address Offset
0x36
Physical Address
Instance
Description
VPLL regulator control register
Type
RW
7
6
5
4
3
2
1
0
Reserved
SEL
ST
Bits
Field Name
Description
Type
Reset
7:4
Reserved
Reserved bit
RO
0x0
R returns
0s
3:2
SEL
Supply voltage (EEPROM bits):
RW
See (1)
SEL[1:0] = 00 : 1.0V
SEL[1:0] = 01 : 1.1 V
SEL[1:0] = 10 : 1.8 V
SEL[1:0] = 11 : 2.5 V
1:0
ST
Supply state (EEPROM bits):
RW
0x0
ST[1:0] = 00 : Off
ST[1:0] = 01 : On high power (ACTIVE)
ST[1:0] = 10 : Off
ST[1:0] = 11 : On low power (SLEEP)
(1)
The reset value for this field varies with boot mode selection and the processor support. Please refer to the corresponding processor
user guide to find the correct default value.
Table 57. VDAC_REG
Address Offset
0x37
Physical Address
Instance
Description
VDAC regulator control register
Type
RW
7
6
5
4
3
2
1
0
Reserved
SEL
ST
70
Copyright 2010, Texas Instruments Incorporated
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