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參數(shù)資料
| 型號(hào)： | PTPS659105A1RSLR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, PQCC48 |
| 封裝： | 6 X 6 MM, 1 MM HEIGHT, GREEN, PLASTIC,VQFN-48 |
| 文件頁(yè)數(shù)： | 75/89頁(yè) |
| 文件大?。?/td> | 941K |
| 代理商： | PTPS659105A1RSLR |
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PRODUCTPREVIEW
www.ti.com
SWCS046C – MARCH 2010 – REVISED JUNE 2010
Table 67. EN1_LDO_ASS_REG
Address Offset
0x45
Physical Address
Instance
Description
Configuration Register setting the LDO regulators, driven by the multiplexed SCLSR_EN1 signal.
When control bit = 1, LDO regulator state is driven by the SCLSR_EN1 control signal and is also defined
though SLEEP_KEEP_LDO_ON register setting:
When SCLSR_EN1 is high the regulator is on,
When SCLSR_EN1 is low:
- the regulator is off if its corresponding Control bit = 0 in SLEEP_KEEP_LDO_ON register
- the regulator is working in low power mode if its corresponding control bit = 1 in
SLEEP_KEEP_LDO_ON register
When control bit = 0 no effect : LDO regulator state is driven though registers programming and the
device state
Any control bit of this register set to 1 will disable the I2C SR Interface functionality
Type
RW
7
6
5
4
3
2
1
0
VDAC_EN1
VPLL_EN1
VAUX33_EN1
VAUX2_EN1
VAUX1_EN1
VDIG2_EN1
VDIG1_EN1
VMMC_EN1
Bits
Field Name
Description
Type
Reset
7
VDAC_EN1
Setting supply state control though SCLSR_EN1 signal
RW
0
6
VPLL_EN1
Setting supply state control though SCLSR_EN1 signal
RW
0
5
VAUX33_EN1
Setting supply state control though SCLSR_EN1 signal
RW
0
4
VAUX2_EN1
Setting supply state control though SCLSR_EN1 signal
RW
0
3
VAUX1_EN1
Setting supply state control though SCLSR_EN1 signal
RW
0
2
VDIG2_EN1
Setting supply state control though SCLSR_EN1 signal
RW
0
1
VDIG1_EN1
Setting supply state control though SCLSR_EN1 signal
RW
0
VMMC_EN1
Setting supply state control though SCLSR_EN1 signal
RW
0
Table 68. EN1_SMPS_ASS_REG
Address Offset
0x46
Physical Address
Instance
Description
Configuration Register setting the SMPS Supplies driven by the multiplexed SCLSR_EN1 signal.
When control bit = 1, SMPS Supply state and voltage is driven by the SCLSR_EN1 control signal and is
also defined though SLEEP_KEEP_RES_ON register setting.
When control bit = 0 no effect : SMPS Supply state is driven though registers programming and the
device state.
Any control bit of this register set to 1 will disable the I2C SR Interface functionality
Type
RW
7
6
5
4
3
2
1
0
RSVD
SPARE_EN1
VDD3_EN1
VDD2_EN1
VDD1_EN1
VIO_EN1
Bits
Field Name
Description
Type
Reset
7:5
RSVD
Reserved bit
RW
0
4
SPARE_EN1
Spare bit
Rw
0
3
VDD3_EN1
When 1:
RW
0
When SCLSR_EN1 is high the supply is on.
When SCLSR_EN1 is low and SLEEP_KEEP_RES_ON = '0' the supply
voltage is off.
When SCLSR_EN1 is low and SLEEP_KEEP_RES_ON = '1' the SMPS
is working in low power mode.
When control bit = 0 no effect: supply state is driven though registers
programming and the device state
Copyright 2010, Texas Instruments Incorporated
77
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