PT0137(08/04)

Ver:4

3

Data Sheet

PT8R1202

PT

Peric om Technology Inc .

Bluetooth Digital Audio Streaming IC

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Product Description

Bluetooth is an open specification for short-range data

communications. It operates in the globally available 2.4

GHz to 2.5 GHz ISM free band. Fast frequency hopping

(1600 hop/s), 79 available channels (2.402 to 2.480 GHz),

and a maximum 1 Mbit/s GFSK modem are allowed.

The PT8R1202 consists of a Bluetooth baseband hardware,

on-chip 128MHz hybrid embedded RISC / DSP processor

and peripheral interface block. The PT8R1202 focuses on

audio streaming to distribute audio content of high-quality

in mono or stereo on ACL channels of Bluetooth. Since

PT8R1202 is highly integrated SOC solution to support the

Advanced Audio Distribution Profile(A2DP) defined in

Bluetooth as audio streaming application with minimum

BOM, the minimum required external devices are just

PT8R100X 2.4GHz radio transceiver IC, external antenna,

crystal, and minimum 256KB flash memory for program

code.

Bluetooth baseband hardware

Bluetooth baseband hardware consists of modem control,

packet processing hardware, and on-chip microcontroller

interface.

Modem control part generates the control signal for modem

and RF block and transmits or receives data with modem.

PT8R1202 supports BlueRF RXMODE2/3 Bluetooth

radio interface with uni/bi-directional and JTAG/DBUS

serial interface like PT8R1000 or PT8R1001 PTI Bluetooth

radio transceiver. In RXMODE3, SYNCWORD correlator

is located in radio transceiver, SYNCWORD detect signal

feeds from external radio transceiver. In RXMODE2,

SYNCWORD correlation is processed in PT8R1202,

SYNCWORD detect signal feed to external radio

transceiver to timing adjustment of modem. In additional to

BlueRF interface, PT8R1202 supports BlueQ interface

with SBI serial interface.

Packet processing for Bluetooth is implemented by a

dedicated hardware for a low power solution whilst

providing the required data throughput. The function

implemented in hardware include : forward error correction,

header error control, cyclic redundancy check, encryption,

and data whitening. On-chip microcontroller interface

generates interrupt signal to on-chip interrupt handler and

processes

DMA

operation

memory(XMEM2)

which

microcontroller. During radio transmission this block

constructs a packet from header information and payload

data/voice taken from a ring buffer in XMEM2 which is

previously loaded by software. For radio reception, this

block stores the packet header and the payload data in the

appropriate ring buffer in XMEM2, which is indicated by

software. After the completion of reception, this block

generates interrupt signal to on-chip interrupt handler. This

architecture minimizes the interventions required by the

processor during packet transmission and reception.

with

shared

16KB

with

internal

on-chip

is

Hybrid embedded RISC / DSP processor

To satisfy multimedia data streaming through wireless

connectivity like Bluetooth, the embedded processor used in

portable system must provide highly energy-efficient

operations, due to the importance of battery weight and size

without compromising high performance when the user

requires it. The functions required in this application are

classified into two computations such as MCU operation

and DSP operation. The former performs all functions

associated with user interface as well as real-time

communication protocols and the latter performs all signal-

processing and multimedia functions.

The on-chip embedded processor in the PT8R1202 is based

on PTI proprietary V6 processor(PiCOII-RISC/DSP), which

is optimized to accelerate both two computations for low

power and high performance embedded processing. Its

instruction set is optimized not only for general embedded

processing but also DSP signal processing specially used in

audio and speech code. This hybrid embedded RISC/DSP

processor supports 24-bit multiplication and 48-bit

accumulator with DSP functionality such as saturation and

rounding. Also, it supports SIMD features, which results in

high performance in 16-bit speech applications.

To support low power consumption, on-chip processor

adopts programmable dynamic clock control, reduces the

complexity of embedded RTOS optimizing for both

Bluetooth connectivity and audio streaming, and minimizes

external I/O access with several techniques. Default

operation frequency is 96MHz at boot and it can be

increased to 128MHz entering into turbo mode. There are

four global power states provided in PT8R1202 such as

active state, sleep state, deep sleep state and power-off state.

In active state, processor can change the processor clock

between normal operation clock, a half of one, and a third of

one. For example, if processor operates in turbo mode, it

can change processor clock between 128MHz, 64MHz and

42MHz. Also, during the execution of “idle” instruction, it

cuts down the processor clock without interrupting I/O

device operation. In sleep state, the clock of all processor

and I/O device except RTC is disabled. In sleep state,

processor can be waked up quickly by RTC time-out event

or external trigger signal since on-chip PLL is still working

in order to fast response. Deep sleep state is the same of

sleep state except on-chip PLL is off also. Since on-chip

PLL is off in deep sleep state, the power consumption is

reduced very much but requires more latency during wake-

up.

To minimize the access of external flash memory for code,

PT8R1202 includes on-chip 16KB instruction cache. In

addition to instruction cache, frequent access code or time

critical code is dynamically located on scratch-pad memory

of internal X/YMEM region. It is possible to allocate up to

96KB as scratch-pad memory in order to reduce external

memory access for low power and high performance

Bluetooth digital audio streaming system.

Total 128KB internal SRAM is integrated large enough to

support both on-chip Bluetooth stack and audio application

without external memory, which results in cost-effective

and low-power consumption systems. Internal SRAM