參數(shù)資料
型號(hào): PSD813F
廠商: 意法半導(dǎo)體
英文描述: Flash In-System-Programmable Microcontroller Peripherals(閃速,在系統(tǒng)可編程微控制器外圍器件,1M位閃速存儲(chǔ)器,256K位EEPROM,16K位SRAM)
中文描述: Flash在系統(tǒng)可編程微控制器外圍設(shè)備(閃速,在系統(tǒng)可編程微控制器外圍器件,100萬(wàn)位閃速存儲(chǔ)器,256K位的EEPROM,16K的位的SRAM)
文件頁(yè)數(shù): 32/130頁(yè)
文件大?。?/td> 650K
代理商: PSD813F
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)當(dāng)前第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)
PSD813F Famly
Prelimnary
28
The
PSD813F
Functional
Blocks
(cont.)
9.1.1.8.3 Flash Erase Suspend Instruction
When a Flash Sector Erase operation is in progress, the Erase Suspend instruction will
suspend the operation by writing 0B0h to any address when an appropriate Chip Select
(FSi or CSBOOTi) is true. (See Table 9). This allows reading of data from another Flash
sector after the Erase operation has been suspended. Erase suspend is accepted only
during the Flash Sector Erase instruction execution and defaults to read array mode. An
Erase Suspend instruction executed during an Erase timeout will, in addition to suspending
the erase, terminate the time out.
The Toggle Bit DQ6 stops toggling when the PSD813F internal logic is suspended. The
toggle Bit status must be monitored at an address within the Flash sector being erased. The
Toggle Bit will stop toggling between 0.1 μs and 15 μs after the Erase Suspend instruction
has been executed. The PSD813F will then automatically be set to Read Flash Block
Memory Array mode.
If an Erase Suspend instruction was executed, the following rules apply:
Attempting to read from a Flash sector that was being erased will output invalid data.
Reading from a Flash sector that was
not
being erased is valid.
The Flash memory
cannot
be programmed, and will only respond to Erase Resume
and Reset instructions (read is an operation and is OK).
If a Reset instruction is received, data in the Flash sector that was being erased will
be invalid.
9.1.1.8.4 Flash Erase Resume Instruction
If an Erase Suspend instruction was previously executed, the erase operation may be
resumed by this instruction. The Erase Resume instruction consists of writing 030h to any
address while an appropriate Chip Select (FSi or CSBOOTi) is true. (See Table 9.)
9.1.1.9 Flash and EEPROM Memory Specific Features
9.1.1.9.1 Flash and EEPROM Sector Protect
Each Flash and EEPROM sector can be separately protected against Program and Erase
functions. Sector Protection provides additional data security because it disables all
program or erase operations. This mode can be activated through the JTAG Port or a
Device Programmer.
Sector protection can be selected for each sector using the PSDsoft Configuration program.
This will automatically protect selected sectors when the device is programmed through
the JTAG Port or a Device Programmer. Flash and EEPROM sectors can be
unprotected to allow updating of their contents using the JTAG Port or a Device
Programmer. The microcontroller can read (but cannot change) the sector protection bits.
Any attempt to program or erase a protected Flash or EEPROM sector will be ignored by
the device. The Verify operation will result in a read of the protected data. This allows a
guarantee of the retention of the Protection status.
The sector protection status can be read by the MCU through the Flash protection and
PSD/EE protection registers (CSIOP). See Table 11.
相關(guān)PDF資料
PDF描述
PSD813FH(中文) Field Programmble Microcontroller Peripherals With Flash Memory(帶閃存的現(xiàn)場(chǎng)可編程微控制器)
PSD813FN(中文) Field Programmble Microcontroller Peripherals(帶閃存的現(xiàn)場(chǎng)可編程微控制器)
PSD813FN Field Programmble Microcontroller Peripherals(帶閃存的現(xiàn)場(chǎng)可編程微控制器)
PSD813FH Field Programmble Microcontroller Peripherals With Flash Memory(帶閃存的現(xiàn)場(chǎng)可編程微控制器)
PSD82 Three Phase Rectifier Bridges
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD813F1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD813F1A 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash in-system programmable (ISP) peripherals for 8-bit MCUs, 5 V
PSD813F1-A 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD813F1A-12J 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
PSD813F1-A-12JI 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs