參數(shù)資料
型號: PSD813F
廠商: 意法半導(dǎo)體
英文描述: Flash In-System-Programmable Microcontroller Peripherals(閃速,在系統(tǒng)可編程微控制器外圍器件,1M位閃速存儲器,256K位EEPROM,16K位SRAM)
中文描述: Flash在系統(tǒng)可編程微控制器外圍設(shè)備(閃速,在系統(tǒng)可編程微控制器外圍器件,100萬位閃速存儲器,256K位的EEPROM,16K的位的SRAM)
文件頁數(shù): 16/130頁
文件大?。?/td> 650K
代理商: PSD813F
PSD813F Famly
Prelimnary
12
Table 5.
PSD813F
Pin
Descriptions
(cont.)
Pin Name Pin*
Type
Description
PC2
18
I/O
PC2 pin of Port C. This port pin can be configured to have
the following functions:
1. MCU I/O — write to or read from a standard output or
input port.
2. CPLD Micro
Cell (McellBC2) output.
3. Input to the PLDs.
4. Vstby — SRAM standby voltage input for SRAM battery
backup.
This pin can be configured as a CMOS or Open Drain output.
PC3
17
I/O
PC3 pin of Port C. This port pin can be configured to have
the following functions:
1. MCU I/O — write to or read from a standard output or
input port.
2. CPLD Micro
Cell (McellBC3) output.
3. Input to the PLDs.
4. TSTAT output** for the JTAG interface.
5. Rdy/Bsy output for in-system parallel programming.
This pin can be configured as a CMOS or Open Drain output.
PC4
14
I/O
PC4 pin of Port C. This port pin can be configured to have
the following functions:
1. MCU I/O — write to or read from a standard output or
input port.
2. CPLD Micro
Cell (McellBC4) output.
3. Input to the PLDs.
4. TERR output** for the JTAG interface.
5. Vbaton — battery backup indicator output. Goes high
when power is being drawn from an external battery.
This pin can be configured as a CMOS or Open Drain output.
PC5
13
I/O
PC5 pin of Port C. This port pin can be configured to have
the following functions:
1. MCU I/O — write to or read from a standard output or
input port.
2. CPLD Micro
Cell (McellBC5) output.
3. Input to the PLDs.
4. TDI input** for the JTAG interface.
This pin can be configured as a CMOS or Open Drain output.
PC6
12
I/O
PC6 pin of Port C. This port pin can be configured to have
the following functions:
1. MCU I/O — write to or read from a standard output or
input port.
2. CPLD Micro
Cell (McellBC6) output.
3. Input to the PLDs.
4. TDO output** for the JTAG interface.
This pin can be configured as a CMOS or Open Drain output.
相關(guān)PDF資料
PDF描述
PSD813FH(中文) Field Programmble Microcontroller Peripherals With Flash Memory(帶閃存的現(xiàn)場可編程微控制器)
PSD813FN(中文) Field Programmble Microcontroller Peripherals(帶閃存的現(xiàn)場可編程微控制器)
PSD813FN Field Programmble Microcontroller Peripherals(帶閃存的現(xiàn)場可編程微控制器)
PSD813FH Field Programmble Microcontroller Peripherals With Flash Memory(帶閃存的現(xiàn)場可編程微控制器)
PSD82 Three Phase Rectifier Bridges
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