參數(shù)資料
型號： PSD611E1
英文描述： Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，4K位SRAM,26個可編程I/O,通用PLD有63個輸入)
中文描述： 現(xiàn)場可編程微控制器外圍設(shè)備和嵌入式微-細(xì)胞（可編程邏輯，4K的位的SRAM，26我個可編程輸入/輸出，通用PLD的有63個輸入）
文件頁數(shù)： 60/84頁
文件大?。?/td> 426K
代理商： PSD611E1
PSD6XX Family
11-60
Power
Management
Unit
(cont.)
Page Register
The four-bit Page Register increases the addressing capability of the microcontroller by a
factor of 16. The contents of the Register can also be read by the microcontroller. The
outputs of the Page Register (PGR0-PGR3) are inputs to the PLD and can be included in
the EPROM or SRAM chip select equations.
Figure 29 shows the Page Register. The four Flip-Flops in the Register are connected to the
internal data bus D0–D3. The microcontroller can write to or read from the Page Register.
The Register can operate as an independent register to the microcontroller if page mode is
not implemented.
RESET
D0-D3
R/W
D0
Q0
Q1
Q2
Q3
D1
D2
D3
PAGE
REG.
PGR0
PGR1
PGR2
PGR3
DPLD
GPLD
ECSPLD
ES0-7
RS0
PLD
Figure 29. Page Register
Reset Input
The PSD6XXE1 has an active low reset input which loads internal configurations and clear
some of the registers. Figure 40 shows the reset timing requirement. The active low range
has a minimum tNLNH duration. After the rising edge of reset, the PSD6XXE1 remains in
the reset state during tOPR range. The device must be reset at power-up prior to use.
While the reset input is active, the PLD is active and the outputs are determined by the
PSDabel equations. The chip status during reset and power down is shown in Table 34.
相關(guān)PDF資料
PDF描述
PSD601E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，4K位SRAM,26個可編程I/O,通用PLD有63個輸入)
PSD602E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，4K位SRAM,26個可編程I/O,通用PLD有63個輸入)
PSD603E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，4K位SRAM,26個可編程I/O,通用PLD有63個輸入)
PSD612E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，4K位SRAM,26個可編程I/O,通用PLD有63個輸入)
PSD613E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，4K位SRAM,26個可編程I/O,通用PLD有63個輸入)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD611E1-15J 制造商:WSI 功能描述: 制造商:WSI 功能描述:32K X 8 OTPROM, 26 I/O, PIA-GENERAL PURPOSE, PQCC52
PSD611E1-15L 制造商:WSI 功能描述:
PSD611E1-70L 制造商:WSI 功能描述:
PSD6121212 制造商:TDK-Lambda Corporation 功能描述:DC/DC,DUAL-OUT,12/-12V,0.25/-0.25A,6W - Bulk
PSD6-12-1212 功能描述:DC/DC轉(zhuǎn)換器 6W 12V 0.25A RoHS:否 制造商:Murata 產(chǎn)品: 輸出功率: 輸入電壓范圍:3.6 V to 5.5 V 輸入電壓（標(biāo)稱）: 輸出端數(shù)量:1 輸出電壓（通道 1）:3.3 V 輸出電流（通道 1）:600 mA 輸出電壓（通道 2）: 輸出電流（通道 2）: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體尺寸:
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