參數(shù)資料
型號(hào): PSD4235G2-A-12J
廠商: 意法半導(dǎo)體
英文描述: Flash In-System Programmable ISP Peripherals For 16-bit MCUs 5V Supply
中文描述: Flash在系統(tǒng)可編程ISP的外設(shè)的16位微控制器5V電源
文件頁(yè)數(shù): 36/89頁(yè)
文件大小: 703K
代理商: PSD4235G2-A-12J
PSD4235G2
36/89
Figure 15. CPLD Output Macrocell
Product Term Allocator.
The CPLD has a Prod-
uct Term Allocator. PSDsoft Express, uses the
Product Term Allocator to borrow and place prod-
uct terms from one Macrocell to another. The fol-
lowing list summarizes how product terms are
allocated:
I
McellA0-McellA7 all have three native product
terms and may borrow up to six more
I
McellB0-McellB3 all have four native product
terms and may borrow up to five more
I
McellB4-McellB7 all have four native product
terms and may borrow up to six more.
Each Macrocell may only borrow product terms
from certain other Macrocells. Product terms al-
ready in use by one Macrocell are not available for
another Macrocell.
If an equation requires more product terms than
are available to it, then “external” product terms
are required, which consume other Output Macro-
cells (OMC). If external product terms are used,
extra delay is added for the equation that required
the extra product terms. This is called product term
expansion. PSDsoft Express performs this expan-
sion as needed.
Loading and Reading the Output Macrocells
(OMC).
The Output Macrocells (OMC) block oc-
cupies a memory location in the MCU address
space, as defined by the CSIOP (see the section
entitled “I/O Ports”, on page 50). The flip-flops in
each of the 16 Output Macrocells (OMC) can be
loaded from the data bus by a MCU. Loading the
Output Macrocells (OMC) with data from the MCU
takes priority over internal functions. As such, the
preset, clear, and clock inputs to the flip-flop can
be overridden by the MCU. The ability to load the
flip-flops and read them back is useful in such ap-
plications as loadable counters and shift registers,
mailboxes, and handshaking protocols.
Data is loaded to the Output Macrocells (OMC) on
the trailing edge of Write Strobe (WR/WRL,
CNTL0).
The OMC Mask Register.
There is one Mask
Register for each of the two groups of eight Output
Macrocells (OMC). The Mask Registers can be
used to block the loading of data to individual Out-
put Macrocells (OMC). The default value for the
Mask Registers is 00h, which allows loading of the
Output Macrocells (OMC). When a given bit in a
Mask Register is set to a 1, the MCU is blocked
from writing to the associated Output Macrocells
PT
ALLOCATOR
MASK
REG.
PT CLK
PT
PT
PT
CLKIN
FEEDBACK (.FB)
PORT INPUT
A
P
MUX
MUX
POLARITY
SELECT
LD
IN
CLR
Q
PR
DIN
COMB/REG
SELECT
PORT
DRIVER
MAINPUT
I/O PIN
INTERNAL DATA BUS
REGISTER
CLEAR (.RE)
PROGRAMMABLE
FF (D/T/JK/SR)
WR
ENABLE (.OE)
PRESET(.PR)
RD
MACROCELL CS
AI04946
相關(guān)PDF資料
PDF描述
PSD4235G1-12B81 Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235G1-12B81I Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235G1-12J Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235G1V-12MI Flash In-System Programmable ISP Peripherals For 16-bit MCUs 5V Supply
PSD4235G1V-12U Flash In-System-Programmable Peripherals for 16-Bit MCUs
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