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參數(shù)資料
| 型號： | PSD4235G1-12J |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| 中文描述： | Flash在系統(tǒng)可編程外設(shè)的16位微控制器 |
| 文件頁數(shù)： | 37/89頁 |
| 文件大?。?/td> | 703K |
| 代理商： | PSD4235G1-12J |
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PSD4235G2
(OMC). For example, suppose McellA0-McellA3
are being used for a state machine. You would not
want a MCU write to McellA to overwrite the state
machine registers. Therefore, you would want to
load the Mask Register for McellA (Mask Macro-
cell A) with the value 0Fh.
The Output Enable of the OMC.
The
Macrocells (OMC) can be connected to an I/O port
pin as a PLD output. The output enable of each
port pin driver is controlled by a single product
term from the AND Array, ORed with the Direction
Register output. The pin is enabled upon Power-
up if no output enable equation is defined and if
the pin is declared as a PLD output in PSDsoft Ex-
press.
If the Output Macrocell (OMC) output is declared
as an internal node and not as a port pin output in
the PSDabel file, then the port pin can be used for
other I/O functions. The internal node feedback
can be routed as an input to the AND Array.
Input Macrocells (IMC).
The CPLD has 24 Input
Macrocells (IMC), one for each pin on Ports A, B,
and C. The architecture of the Input Macrocells
(IMC) is shown in Figure 16. The Input Macrocells
(IMC) are individually configurable, and can be
used as a latch, register, or to pass incoming Port
signals prior to driving them onto the PLD input
bus. The outputs of the Input Macrocells (IMC) can
be read by the MCU through the internal data bus.
The enable for the latch and clock for the register
are driven by a multiplexer whose inputs are a
Output
product term from the CPLD AND Array or the
MCU Address Strobe (ALE/AS). Each product
term output is used to latch or clock four Input
Macrocells (IMC). Port inputs 3-0 can be con-
trolled by one product term and 7-4 by another.
Configurations for the Input Macrocells (IMC) are
specified by PSDsoft Express (see Application
Note AN1171). Outputs of the Input Macrocells
(IMC) can be read by the MCU via the IMC buffer.
See the section entitled “I/O Ports”, on page 50.
Input Macrocells (IMC) can use Address Strobe
(ALE/AS, PD0) to latch address bits higher than
A15. Any latched addresses are routed to the
PLDs as inputs.
Input Macrocells (IMC) are particularly useful with
handshaking communication applications where
two processors pass data back and forth through
a common mailbox. Figure 18 shows a typical con-
figuration where the Master MCU writes to the Port
A Data Out Register. This, in turn, can be read by
the Slave MCU via the activation of the “Slave-
Read” output enable product term.
The Slave can also write to the Port A Input Mac-
rocells (IMC) and the Master can then read the In-
put Macrocells (IMC) directly.
Note that the “Slave-Read” and “Slave-Wr” signals
are product terms that are derived from the Slave
MCU inputs Read Strobe (RD, CNTL1), Write
Strobe (WR/WRL, CNTL0), and Slave_CS.
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| PSD4235G1V-12MI | Flash In-System Programmable ISP Peripherals For 16-bit MCUs 5V Supply |
| PSD4235G1V-12U | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4235G1V-12UI | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4235G1-C-70U | CAP 0.33UF 25V 10% TANT SMD-3216-18 TR-13-PL SN100% |
| PSD4235G1-C-70UI | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PSD4235G2-70U | 功能描述:SPLD - 簡單可編程邏輯器件 5.0V 4M 70ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| PSD4235G2-90U | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| PSD4235G2-90UI | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| PSD4235G2V-12UI | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 3.3V 4M 120ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| PSD4235G2V-90U | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 3.3V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
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