參數(shù)資料
型號： PSD4235F2-20MI
廠商： 意法半導(dǎo)體
英文描述： Flash In-System Programmable ISP Peripherals For 16-bit MCUs 5V Supply
中文描述： Flash在系統(tǒng)可編程ISP的外設(shè)的16位微控制器5V電源
文件頁數(shù)： 40/89頁
文件大小： 703K
代理商： PSD4235F2-20MI
PSD4235G2
40/89
MCU BUS INTERFACE
The “no-glue logic” MCU Bus Interface block can
be directly connected to most popular MCUs and
their control signals. Key 16-bit MCUs, with their
bus types and control signals, are shown in Table
34. The MCU interface type is specified using the
PSDsoft Express.
PSD Interface to a Multiplexed Bus.
Figure 19
shows an example of a system using a MCU with
a 16-bit multiplexed bus and a PSD4235G2. The
ADIO port on the PSD is connected directly to the
MCU address/data bus. Address Strobe (ALE/AS,
PD0) latches the address signals internally.
Latched addresses can be brought out to Port E, F
or G. The PSD drives the ADIO data bus only
when one of its internal resources is accessed and
Read Strobe (RD, CNTL1) is active. Should the
system address bus exceed sixteen bits, Ports A,
B, C, or F may be used as additional address in-
puts.
PSD Interface to a Non-Multiplexed 8-Bit Bus.
Figure 20 shows an example of a system using a
MCU with a 16-bit non-multiplexed bus and a
PSD4235G2. The address bus is connected to the
ADIO Port, and the data bus is connected to Ports
F and G. Ports F and G are in tri-state mode when
the PSD is not accessed by the MCU. Should the
system address bus exceed sixteen bits, Ports A,
B, or C may be used for additional address inputs.
Table 34. MCUs and their Control Signals
Note: 1. Unused CNTL2 pin can be configured as CPLD input. Other unused pins (PD3-PD0, PF3-PF0) can be configured for other I/O func-
tions.
2. ALE/AS input is optional for MCUs with a non-multiplexed bus
MCU
CNTL0
CNTL1
CNTL2
PD3
PD0
2
ADIO0
PF3-PF0
68302, 68306, MMC2001
R/W
LDS
UDS
(Note
1
)
AS
—
(Note
1
)
68330, 68331, 68332, 68340
R/W
DS
SIZ0
(Note
1
)
AS
A0
(Note
1
)
68LC302, MMC2001
WEL
OE
—
WEH
AS
—
(Note
1
)
68HC16
R/W
DS
SIZ0
(Note
1
)
AS
A0
(Note
1
)
68HC912
R/W
E
LSTRB
DBE
E
A0
(Note
1
)
68HC812
3
R/W
E
LSTRB
(Note
1
)
(Note
1
)
A0
(Note
1
)
80196
WR
RD
BHE
(Note
1
)
ALE
A0
(Note
1
)
80196SP
WRL
RD
(Note
1
)
WRH
ALE
A0
(Note
1
)
80186
WR
RD
BHE
(Note
1
)
ALE
A0
(Note
1
)
80C161, 80C164-80C167
WR
RD
BHE
(Note
1
)
ALE
A0
(Note
1
)
80C51XA
WRL
RD
PSEN
WRH
ALE
A4/D0
A3-A1
H8/300
WRL
RD
(Note
1
)
WRH
AS
A0
—
M37702M2
R/W
E
BHE
(Note
1
)
ALE
A0
(Note
1
)
相關(guān)PDF資料
PDF描述
PSD4235F2-20U Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235F2-20UI Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235F2-A-12M Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235F2-A-12MI Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235F2-A-12U Flash In-System-Programmable Peripherals for 16-Bit MCUs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD4235G2-70U 功能描述:SPLD - 簡單可編程邏輯器件 5.0V 4M 70ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD4235G2-90U 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD4235G2-90UI 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD4235G2V-12UI 功能描述:CPLD - 復(fù)雜可編程邏輯器件 3.3V 4M 120ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD4235G2V-90U 功能描述:CPLD - 復(fù)雜可編程邏輯器件 3.3V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
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