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參數(shù)資料
| 型號(hào)： | PSD303L |
| 英文描述： | Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有16個(gè)輸入) |
| 中文描述： | 現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備（可編程邏輯，16K的位的SRAM，19余個(gè)可編程輸入/輸出，通用PLD的有16個(gè)輸入） |
| 文件頁(yè)數(shù)： | 4/14頁(yè) |
| 文件大小： | 138K |
| 代理商： | PSD303L |
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PSD3XX – Application Note 022
1-204
The 80C31
Family
(Cont.)
Table 2 shows the I/O, EPROM and SRAM blocks located throughout the memory map but
not overlapping as in the case of the "separate" mode.
If SRAM or I/O is overlapped on the EPROM block in the memory map in the
"combined mode", the SRAM or I/O will be accessed in that address range. The EPROM
portion that is overlapped becomes inaccessible. In the "separate" mode, EPROM and
SRAM can be overlapped and both are accessible because the PSEN and RD separately
enable these blocks to the output. In the "combined" mode, these enables are gated
together and SRAM and I/O have priority over the EPROM (for example, if the SRAM is
mapped at the same start address as EPROM block 7 (ES7), the first 2K of ES7 will be
SRAM access and the rest of the 8K block will be EPROM access).
Table 2. "Combined" Mode PSD3XX Choices
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PSD303 | Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有16個(gè)輸入) |
| PSD311L | Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有12個(gè)輸入) |
| PSD311 | Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有12個(gè)輸入) |
| PSD312-15IB | Field-Programmable Peripheral |
| PSD312-20IB | Field-Programmable Peripheral |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PSD303L-15J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD303L-15JI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD303L-15LI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD303L-15LM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD303L-15U | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
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