- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄368097 > PPC440SPE-AGB533C (APPLIEDMICRO INC) PowerPC 440SPe Embedded Processor PDF資料下載
參數(shù)資料
| 型號(hào)： | PPC440SPE-AGB533C |
| 廠商： | APPLIEDMICRO INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | PowerPC 440SPe Embedded Processor |
| 中文描述： | 32-BIT, 533 MHz, RISC PROCESSOR, PBGA675 |
| 封裝： | 27 X 27 MM, 1 MM PITCH, PLASTIC, FCBGA-675 |
| 文件頁(yè)數(shù)： | 75/80頁(yè) |
| 文件大小： | 572K |
| 代理商： | PPC440SPE-AGB533C |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)當(dāng)前第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)
PowerPC 440SPe Embedded Processor
Revision 1.23 - Sept 21, 2006
Preliminary Data Sheet
AMCC Proprietary
75
In the following examples, the data strobes (DQS) and the data are shown to be coincident. There is actually a
slight skew as specified by the SDRAM specifications, and there can be additional skew due to loading and signal
routing. It is recommended that the signal length for all of the eight DQS signals be matched.
Figure 10. DDR SDRAM Memory Data and DQS
Table 20. DDR SDRAM I/O Read Timing—T
SD
and T
HD
Notes:
1. T
SD
and T
HD
are measured under worst case conditions.
2. Clock speed for the values in the table is 333.33MHz.
3. The time values in the table include 1/4 of a cycle at 166MHz (3ns x 0.25 = 0.75 ns).
4. To obtain adjusted T
SD
and T
HD
values for lower clock frequencies, subtract 0.75 ns from the values in the table and add 1/4
of the cycle time for the lower clock frequency (e.g., T
SD
- 0.75 + 0.25T
CYC
).
Signal Names
Reference Signal
Read Data vs DQS Set up
T
SD
(ns)
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
Read Data vs DQS Hold
T
HD
(ns)
1.00
1.00
1.00
1.00
1.00
1.00
1.00
1.00
1.00
MemData00:07
MemData08:15
MemData16:23
MemData24:31
MemData32:39
MemData40:47
MemData48:55
MemData56:63
ECC0:7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQS
MemData
T
SD
T
HD
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PPC440SPE-AGB667C | PowerPC 440SPe Embedded Processor |
| PPC440SPE-ANB533C | PowerPC 440SPe Embedded Processor |
| PPC440SPE-RGB533C | PowerPC 440SPe Embedded Processor |
| PPC440SPE-RGB667C | PowerPC 440SPe Embedded Processor |
| PPC440SPE-RNB533C | PowerPC 440SPe Embedded Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PPC440SPE-AGB667C | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PowerPC 440SPe Embedded Processor |
| PPC440SPE-ANB533C | 制造商:AppliedMicro 功能描述:MPU 440SPe RISC 16-Bit 0.13mm 533MHz 1.5V/3.3V 675-Pin FCBGA Tray 制造商:AMCC 功能描述:MPU 440SPE RISC 16BIT 0.13MM 533MHZ 1.5V/3.3V 675FCBGA - Trays |
| PPC440SPE-ANB667C | 制造商:AppliedMicro 功能描述:MPU 440SPe RISC 16-Bit 0.13mm 667MHz 1.5V/3.3V 675-Pin FCBGA Tray 制造商:AMCC 功能描述:MPU 440SPE RISC 16BIT 0.13MM 667MHZ 1.5V/3.3V 675FCBGA - Trays |
| PPC440SPE-ANB800C | 制造商:AppliedMicro 功能描述:MPU 440SPe RISC 16-Bit 0.13mm 800MHz 1.5V/3.3V 675-Pin FCBGA Tray 制造商:Applied Micro Circuits Corporation 功能描述:MPU 440SPe RISC 16-Bit 0.13mm 800MHz 1.5V/3.3V 675-Pin FCBGA Tray |
| PPC440SPE-RGB533C | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PowerPC 440SPe Embedded Processor |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。