參數(shù)資料
型號(hào): PPC440GRx-NpAfffTs
廠商: Applied Micro Circuits Corp.
英文描述: PowerPC 440GRx Embedded Processor
中文描述: 嵌入式處理器的PowerPC 440GRx
文件頁數(shù): 74/88頁
文件大小: 603K
代理商: PPC440GRX-NPAFFFTS
440GRx – PPC440GRx Embedded Processor
Preliminary Data Sheet
74
AMCC Proprietary
Revision 1.08 – October 15, 2007
Figure 6. Input Setup and Hold Waveform
Figure 7. Output Delay and Float Timing Waveform
TmrClk frequency
100
MHz
TmrClk period
10
ns
TmrClk high time
40% of nominal period
60% of nominal period
ns
TmrClk low time
40% of nominal period
60% of nominal period
ns
Notes:
1. T
OPB
is the period in ns of the OPB clock. The internal OPB clock runs at 1/2 the frequency of the PLB clock. The maximum OPB clock
frequency is 83 MHz.
2. An internal PLL improves this duty cycle to a worst case of 48% minimum, 52% maximum.
Table 20. Peripheral Interface Clock Timings (continued)
Parameter
Min
Max
Units
Notes
Clock
T
IS
T
IH
min
min
Inputs
Valid
1.25V(1.5V)
Valid
Clock
Outputs
Valid
T
OH
min
T
OV
max
T
OV
max
T
OH
min
T
OV
max
T
OH
min
Float (High-Z)
High (Drive)
Low (Drive)
1.25V(1.5V)
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