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參數(shù)資料
| 型號(hào)： | PowerPC 405CR |
| 廠商： | IBM Microeletronics |
| 英文描述： | 32-bit RISC Embedded Controllers(32位RISC結(jié)構(gòu)嵌入式控制器) |
| 中文描述： | 32位RISC嵌入式控制器（32位的RISC結(jié)構(gòu)嵌入式控制器） |
| 文件頁數(shù)： | 27/42頁 |
| 文件大小： | 565K |
| 代理商： | POWERPC 405CR |
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PowerPC 405CR Embedded Controller Data Sheet
27
UART1_Rx
UART1 Serial In data
I
5V tolerant
3.3V LVTTL
Rcvr
1, 4
UART1_Tx
UART1 Serial Out data.
O
5V tolerant
3.3V LVTTL
6
UART1_DSR
[UART1_CTS]
UART1 Data Set Ready
or
UART1 Clear To Send. To access this function, software must
toggle a DCR register bit.
I
5V tolerant
3.3V LVTTL
Rcvr
1, 4
UART1_RTS
[UART1_DTR]
UART1 Request To Send
or
UART1 Data Terminal Ready. To access this function, software
must toggle a DCR register bit.
O
5V tolerant
3.3V LVTTL
6
IICSCL
IIC Serial Clock
I/O
5V tolerant
3.3V LVTTL
1, 2
IICSDA
IIC Serial Data
I/O
5V tolerant
3.3V LVTTL
1, 2
Interrupts Interface
IRQ0:6[GPIO17:23]
Interrupt requests
or
General Purpose I/O. To access this function, software must
toggle a DCR register bit.]
I[I/O]
5V tolerant
3.3V LVTTL
1, 5
JTAG Interface
TDI
Test data in
I
5V tolerant
3.3V LVTTL
Rcvr
1, 4
TMS
JTAG test mode select
I
5V tolerant
3.3V LVTTL
Rcvr
1, 4
TDO
Test data out
O
5V tolerant
3.3V LVTTL
TCK
JTAG test clock
I
5V tolerant
3.3V LVTTL
Rcvr
1, 4
TRST
JTAG reset
I
5V tolerant
Rcvr
5
Signal Functional Description
(Part 4 of 6)
Multiplexed signals are shown in brackets following the first signal name assigned to each multiplexed ball.
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3k
to 3.3V, 10k
to 5V
)
3. Must pull down (recommended value is 1k
)
4. If not used, must pull up (recommended value is 3k
to 3.3V)
5. If not used, must pull down (recommended value is 1k
)
6. Strapping input during reset; pull-up or pull-down required
Signal Name
Description
I/O
Type
Notes
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