參數(shù)資料
型號(hào): PM6652TR
廠商: STMICROELECTRONICS
元件分類: 穩(wěn)壓器
英文描述: SWITCHING CONTROLLER, 600 kHz SWITCHING FREQ-MAX, QCC32
封裝: 5 X 5 MM, 1 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, VFQFPN-32
文件頁(yè)數(shù): 36/53頁(yè)
文件大?。?/td> 2519K
代理商: PM6652TR
PM6652
Device description
Doc ID 16867 Rev 3
41/53
8.11
System accuracy
8.11.1
VCORE accuracy
Starting from Equation 7 and Equation 9, the programmed output voltage is given by:
Equation 23
VDAC is the internal reference voltage, i.e. the digital-to-analog converter output
programmed by the 7 VIDs;
GD is the droop gain, given by Equation 8;
GSNS is the current sensing filter attenuation. This element is lower than 1 if there is an
NTC thermal compensation network, typically used in DCR current sensing technique;
RSNS is the current sensing element, i.e. the inductor DCR or the precision resistor;
The statistical variation of the output voltage is given by the following equation:
Equation 24
δV
DAC is the internal reference voltage error, lower than 0.7% of the programmed VID
δG
D/GD and δGSNS/GSNS are the statistical error of the droop gain and NTC network, if
used. This two elements are only influenced by external components;
δR
SNS is the current sensing element (inductor's DCR or precision resistor) variation
due to its accuracy;
δV
OFFSET < 2.5 mV is the PM6652 integrator maximum offset.
Based on Equation 7 the droop gain statistical error is:
Equation 25
The same mathematical approach provides with the following computation, based on
(
)
OUT
SNS
D
DAC
SNS
_
SS
SNS
_
CC
I
R
G
V
=
() (
)
() (
)
SNS
D
2
OFFSET
D
2
SNS
OUT
2
SNS
2
D
2
OUT
SNS
2
DAC
STAT
,
CORE
G
V
G
R
I
G
I
R
G
V
=
δ
+
δ
+
δ
+
δ
+
δ
=
δ
2
1
2
D
1
2
D
R
G
1
G
R
1
G
δ
+
δ
=
δ
+
=
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