參數(shù)資料
型號: PM6652TR
廠商: STMICROELECTRONICS
元件分類: 穩(wěn)壓器
英文描述: SWITCHING CONTROLLER, 600 kHz SWITCHING FREQ-MAX, QCC32
封裝: 5 X 5 MM, 1 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, VFQFPN-32
文件頁數(shù): 22/53頁
文件大?。?/td> 2519K
代理商: PM6652TR
PM6652
Device description
Doc ID 16867 Rev 3
29/53
8.3
Pulse-skip working mode
The PM6652 can obtain very high efficiency at light load if the low side MOSFET is turned
off when the inductor current becomes equal to zero. This feature is performed by the zero
crossing comparator (see the internal block diagram, Figure 24 on page 24). In CPU and
VR11 mode this feature is activated by asserting DPRSLPVR pin. In GFX render mode the
DPRSLPVR assertion implies also that the VDAC minimum slew-rate is 10mV/s, for
increasing programmed output voltage, as required by IMPV6.5 specifications for render
suspend fast exit mode (refer to Voltage dynamic (VID) transitions for details).
8.4
Differential remote sensing
The PM6652 performs a differential remote sensing, between VSNS and GSNS pins. The
error between the sensed output voltage and the programmed one (VSNS - VDAC) and
between the remote ground and local one (GSNS - GND) are the other two inputs of the
integrator, as shown in Figure 25 on page 28. The differential remote sense must be directly
connected to the mobile processor differential feedback pins; only two catch resistors
(100
Ω) are allowed to avoid any VR output voltage runaway, due to a lack of negative
feedback when the processor is not mounted.
8.5
Droop function
In order to reduce the output capacitance amount, the PM6652 performs a load dependent
behavior. The voltage sensed between pins CSNS and VOUT is proportional to the load
current:
Equation 6
Given the network shown in Figure 25 on page 28, the resultant regulated output voltage is:
Equation 7
From the previous equation the equivalent droop resistance performed by the switching
regulator is:
Equation 8
The sense resistor can be a dedicated precision resistor or the inductor's DCR as explained
LOAD
SNS
OUT
SNS
I
R
V
C
=
LOAD
SNS
1
2
DAC
SS
_
GND
SS
_
CORE
I
R
1
V
+
=
SNS
D
SNS
1
2
DROOP
R
G
R
1
R
=
+
=
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