參數(shù)資料
型號(hào): PM6652TR
廠商: STMICROELECTRONICS
元件分類: 穩(wěn)壓器
英文描述: SWITCHING CONTROLLER, 600 kHz SWITCHING FREQ-MAX, QCC32
封裝: 5 X 5 MM, 1 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, VFQFPN-32
文件頁(yè)數(shù): 27/53頁(yè)
文件大?。?/td> 2519K
代理商: PM6652TR
PM6652
Device description
Doc ID 16867 Rev 3
33/53
RA//RB1, and the resultant voltage drop is found on the VCORE output voltage, in
agreement with Equation 7.
Equation 13
The result is an output voltage drop also at no load.
In order to avoid this no-load voltage drop condition, the current sensing filter equivalent
resistance, i.e. RA//RB1, should fall in the range 1 k
Ω÷10 kΩ.
Figure 33.
Thermal compensation network
8.8
Soft-start and soft-end
The DAC voltage slew-rate at start-up can be decreased, in order to limit the inrush current,
in GFX and VR11 supply mode. A soft-start capacitor CSS placed between SSTART pin and
SGND is charged and discharged with 50 A (only at start-up). The resultant soft-start
capacitor voltage variation is exploited by the internal DAC to ramp-up to the VIDs
programmed value (in GFX mode) or to VBOOT default voltage (in VR11 mode), with
12.5 mV steps. Figure 36 shows the soft-start VDAC voltage slew-rate vs CSS capacitance.
If the SSTART pin is connected to SVCC, the VDAC ramp-up (and VOUT output voltage too)
is performed with minimum 5mV/s voltage slew-rate. This function is performed in CPU
IMVP6.5 mode only.
and Figure 35 show the different soft-start mechanism for GFX mode and CPU
mode, assuming the following typical values for timing:
TON =350 s;
TSTART depends on the soft-start programmed slew-rate and voltage; for CPU mode,
the soft-start slew-rate is 6.25 mV/s (typ.) and VBOOT = 1.1 V so TSTART = 176 s
typ.
TBOOT = 70 s
TPG = 4ms
1
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