2006 Microchip Technology Inc.
Advance Information
DS39762A-page 463
PIC18F97J60 FAMILY
RG2/RX2/DT2 ......................................................26, 35
RG3/CCP4/P3D ...................................................26, 35
RG4/CCP5/P1D .............................................20, 26, 35
RG5 ............................................................................35
RG6 ............................................................................35
RG7 ............................................................................35
RH0 ............................................................................27
RH0/A16 ....................................................................36
RH1 ............................................................................27
RH1/A17 ....................................................................36
RH2 ............................................................................27
RH2/A18 ....................................................................36
RH3 ............................................................................27
RH3/A19 ....................................................................36
RH4/AN12/P3C ....................................................27, 36
RH5/AN13/P3B ....................................................27, 36
RH6/AN14/P1C ....................................................27, 36
RH7/AN15/P1B ....................................................27, 36
RJ0/ALE .....................................................................37
RJ1/OE ......................................................................37
RJ2/WRL ....................................................................37
RJ3/WRH ...................................................................37
RJ4 .............................................................................28
RJ4/BA0 .....................................................................37
RJ5 .............................................................................28
RJ5/CE .......................................................................37
RJ6/LB .......................................................................37
RJ7/UB .......................................................................37
TPIN- ..............................................................20, 28, 38
TPIN+ .............................................................20, 28, 38
TPOUT- ..........................................................20, 28, 38
TPOUT+ .........................................................20, 28, 38
V
DD
................................................................20, 28, 38
V
DDCORE
/V
CAP
...............................................20, 28, 38
V
DDPLL
...........................................................20, 28, 38
V
DDRX
............................................................20, 28, 38
V
DDTX
.............................................................20, 28, 38
V
SS
.................................................................20, 28, 38
V
SSPLL
............................................................20, 28, 38
V
SSRX
.............................................................20, 28, 38
V
SSTX
.............................................................20, 28, 38
Pinout I/O Descriptions
PIC18F66J60/66J65/67J60 .......................................14
PIC18F86J60/86J65/87J60 .......................................21
PIC18F96J60/96J65/97J60 .......................................29
PIR Registers ...................................................................124
PLL Block ...........................................................................41
Clock Speeds for Various Configurations ..................42
POP .................................................................................388
POR. See Power-on Reset.
PORTA
Associated Registers ...............................................137
LATA Register ..........................................................136
PORTA Register ......................................................136
TRISA Register ........................................................136
PORTB
Associated Registers ...............................................140
LATB Register ..........................................................138
PORTB Register ......................................................138
RB7:RB4 Interrupt-on-Change Flag
(RBIF Bit) .........................................................138
TRISB Register ........................................................138
PORTC
Associated Registers ............................................... 143
LATC Register ......................................................... 141
PORTC Register ...................................................... 141
RC3/SCK1/SCL1 Pin ............................................... 272
TRISC Register ....................................................... 141
PORTD
Associated Registers ............................................... 147
LATD Register ......................................................... 144
PORTD Register ...................................................... 144
TRISD Register ....................................................... 144
PORTE
Associated Registers ............................................... 150
LATE Register ......................................................... 148
PORTE Register ...................................................... 148
PSP Mode Select (PSPMODE Bit) .......................... 160
RE0/AD8/RD/P2D Pin ............................................. 160
RE1/AD9/WR/P2C Pin ............................................ 160
RE2/AD10/CS/P2B Pin ............................................ 160
TRISE Register ........................................................ 148
PORTF
Associated Registers ............................................... 152
LATF Register ......................................................... 151
PORTF Register ...................................................... 151
TRISF Register ........................................................ 151
PORTG
Associated Registers ............................................... 155
LATG Register ......................................................... 153
PORTG Register ..................................................... 153
TRISG Register ....................................................... 153
PORTH
Associated Registers ............................................... 157
LATH Register ......................................................... 156
PORTH Register ...................................................... 156
TRISH Register ....................................................... 156
PORTJ
Associated Registers ............................................... 159
LATJ Register .......................................................... 158
PORTJ Register ...................................................... 158
TRISJ Register ........................................................ 158
Power-Managed Modes ..................................................... 45
and EUSART Operation .......................................... 305
and SPI Operation ................................................... 263
Clock Sources ........................................................... 45
Clock Transitions and Status Indicators .................... 46
Entering ..................................................................... 45
Exiting Idle and Sleep Modes .................................... 51
By Interrupt ........................................................ 51
By Reset ............................................................ 51
By WDT Time-out .............................................. 51
Without an Oscillator Start-up Delay ................. 51
Idle Modes ................................................................. 49
PRI_IDLE .......................................................... 50
RC_IDLE ........................................................... 51
SEC_IDLE ......................................................... 50
Multiple Sleep Commands ......................................... 46
Run Modes ................................................................ 46
PRI_RUN ........................................................... 46
RC_RUN ............................................................ 48
SEC_RUN ......................................................... 46
Selecting .................................................................... 45
Sleep Mode ............................................................... 49
Summary (table) ........................................................ 45