PIC18F6X2X/8X2X
DS39612A-page 300
Advance Information
2003 Microchip Technology Inc.
IORLW
Example:
Before Instruction
W
After Instruction
W
IORWF
Example:
Before Instruction
RESULT =
W
After Instruction
RESULT =
W
Inclusive OR literal with W
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
[
label
] IORLW k
0
≤
k
≤
255
(W) .OR. k
→
W
N, Z
0000
1001
kkkk
kkkk
The contents of W are OR’ed with
the eight-bit literal ‘k’. The result is
placed in W.
1
1
Words:
Cycles:
Q Cycle Activity:
Q1
Q2
Read
literal ‘k’
Q3
Q4
Decode
Process
Data
Write to W
IORLW
0x35
=
0x9A
=
0xBF
Inclusive OR W with f
Syntax:
Operands:
[
label
] IORWF f [,d [,a]
0
≤
f
≤
255
d
∈
[0,1]
a
∈
[0,1]
(W) .OR. (f)
→
dest
N, Z
Operation:
Status Affected:
Encoding:
Description:
0001
00da
ffff
ffff
Inclusive OR W with register ‘f’. If
‘d’ is 0, the result is placed in W. If
‘d’ is 1, the result is placed back in
register ‘f’ (default). If ‘a(chǎn)’ is 0, the
Access Bank will be selected, over-
riding the BSR value. If ‘a(chǎn)’ = 1, then
the bank will be selected as per the
BSR value (default).
1
1
Words:
Cycles:
Q Cycle Activity:
Q1
Q2
Read
register ‘f’
Q3
Q4
Decode
Process
Data
Write to
destination
IORWF RESULT, 0, 1
0x13
0x91
=
0x13
0x93
=
