PIC18F87J10 FAMILY
DS39663A-page 384
Advance Information
2005 Microchip Technology Inc.
Half-Bridge Output Mode
Applications Example .......................................174
Output Configurations ..............................................172
Output Relationships (Active-High) ..........................173
Output Relationships (Active-Low) ...........................173
Period .......................................................................171
Programmable Dead-Band Delay ............................178
Setup for PWM Operation ........................................181
Start-up Considerations ...........................................179
Q
Q Clock ....................................................................165, 172
R
RAM.
See
Data Memory.
RC_IDLE Mode ..................................................................41
RC_RUN Mode ..................................................................38
RCALL ..............................................................................309
RCON Register
Bit Status During Initialization ....................................48
Reader Response ............................................................388
Register File .......................................................................67
Registers
ADCON0 (A/D Control 0) .........................................247
ADCON1 (A/D Control 1) .........................................248
ADCON2 (A/D Control 2) .........................................249
BAUDCONx (Baud Rate Control) ............................228
CCPxCON (CCP Control,
CCP4 and CCP5) .............................................159
CCPxCON (Enhanced Capture/Compare/
PWM Control) ..................................................167
CMCON (Comparator Control) ................................257
CONFIG1H (Configuration 1 High) ..........................269
CONFIG1L (Configuration 1 Low) ............................269
CONFIG2H (Configuration 2 High) ..........................270
CONFIG2L (Configuration 2 Low) ............................270
CONFIG3H (Configuration 3 High) ..........................271
CONFIG3H (Configuration 3 Low) ...........................271
CONFIG3L (Configuration 3 Low) ..............................57
CVRCON (Comparator Voltage
Reference Control) ...........................................263
Device ID Register 1 ................................................272
Device ID Register 2 ................................................272
ECCPxAS (ECCP Auto-Shutdown
Control) ............................................................179
ECCPxDEL (PWM Configuration) ............................178
INTCON (Interrupt Control) ......................................101
INTCON2 (Interrupt Control 2) .................................102
INTCON3 (Interrupt Control 3) .................................103
IPR1 (Peripheral Interrupt Priority 1) ........................110
IPR2 (Peripheral Interrupt Priority 2) ........................111
IPR3 (Peripheral Interrupt Priority 3) ........................112
MEMCON (External Memory Bus Control) ................86
OSCCON (Oscillator Control) ....................................32
OSCTUNE (PLL Control) ...........................................29
PIE1 (Peripheral Interrupt Enable 1) ........................107
PIE2 (Peripheral Interrupt Enable 2) ........................108
PIE3 (Peripheral Interrupt Enable 3) ........................109
PIR1 (Peripheral Interrupt Request
(Flag) 1) ...........................................................104
PIR2 (Peripheral Interrupt Request
(Flag) 2) ...........................................................105
PIR3 (Peripheral Interrupt Request
(Flag) 3) ...........................................................106
PSPCON (Parallel Slave Port Control) ....................139
RCON (Reset Control) .......................................44, 113
RCSTAx (Receive Status and Control) .................... 227
SSPxCON1 (MSSPx Control 1,
I
2
C Mode) ........................................................ 195
SSPxCON1 (MSSPx Control 1,
SPI Mode) ........................................................ 185
SSPxCON2 (MSSPx Control 2,
I
2
C Mode) ........................................................ 196
SSPxSTAT (MSSPx Status,
I
2
C Mode) ........................................................ 194
SSPxSTAT (MSSPx Status,
SPI Mode) ........................................................ 184
STATUS .................................................................... 73
STKPTR (Stack Pointer) ............................................ 60
T0CON (Timer0 Control) ......................................... 141
T1CON (Timer1 Control) ......................................... 145
T2CON (Timer2 Control) ......................................... 151
T3CON (Timer3 Control) ......................................... 153
T4CON (Timer 4 Control) ........................................ 157
TXSTAx (Transmit Status and Control) ................... 226
WDTCON (Watchdog Timer Control) ...................... 273
Reset ................................................................................. 43
MCLR Reset, During
Power-Managed Modes .................................... 43
MCLR Reset, Normal Operation ................................ 43
Power-on Reset (POR) .............................................. 43
Programmable Brown-out Reset (BOR) .................... 43
Stack Full Reset ......................................................... 43
Stack Underflow Reset .............................................. 43
Watchdog Timer (WDT) Reset .................................. 43
Resets .............................................................................. 267
Brown-out Reset (BOR) ........................................... 267
Oscillator Start-up Timer (OST) ............................... 267
Power-on Reset (POR) ............................................ 267
Power-up Timer (PWRT) ......................................... 267
RETFIE ............................................................................ 310
RETLW ............................................................................ 310
RETURN .......................................................................... 311
Return Address Stack ........................................................ 59
Return Stack Pointer (STKPTR) ........................................ 60
RLCF ............................................................................... 311
RLNCF ............................................................................. 312
RRCF ............................................................................... 312
RRNCF ............................................................................ 313
S
SCKx ................................................................................ 183
SDIx ................................................................................. 183
SDOx ............................................................................... 183
SEC_IDLE Mode ............................................................... 40
SEC_RUN Mode ................................................................ 36
Serial Clock, SCKx .......................................................... 183
Serial Data In (SDIx) ........................................................ 183
Serial Data Out (SDOx) ................................................... 183
Serial Peripheral Interface.
See
SPI Mode.
SETF ................................................................................ 313
Slave Select (SSx) ........................................................... 183
SLEEP ............................................................................. 314
Sleep
OSC1 and OSC2 Pin States ...................................... 33
Sleep Mode ........................................................................ 39
Software Simulator (MPLAB SIM) ................................... 330
Software Simulator (MPLAB SIM30) ............................... 330
Special Event Trigger.
See
Compare (ECCP Module).
Special Features of the CPU ........................................... 267