- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨�(m菐i)璩�(m脿i)IC缍�(w菐ng) > PDF鐩寗11610 > PIC16F1512-E/SS (Microchip Technology)IC MCU 8BIT 3.5KB FLASH 28-SSOP PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | PIC16F1512-E/SS |
| 寤犲晢锛� | Microchip Technology |
| 鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 51/348闋�(y猫) |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC MCU 8BIT 3.5KB FLASH 28-SSOP |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 47 |
| 绯诲垪锛� | PIC® XLP™ 16F |
| 鏍稿績铏曠悊鍣細 | PIC |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 20MHz |
| 閫ｉ€氭€э細 | I²C锛孡IN锛孲PI锛孶ART/USART |
| 澶栧湇瑷�(sh猫)鍌欙細 | 娆犲妾㈡脯(c猫)/寰�(f霉)浣�锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 25 |
| 绋嬪簭瀛樺劜(ch菙)鍣ㄥ閲忥細 | 3.5KB锛�2K x 14锛� |
| 绋嬪簭瀛樺劜(ch菙)鍣ㄩ鍨嬶細 | 闁冨瓨 |
| RAM 瀹归噺锛� | 128 x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 2.3 V ~ 5.5 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 17x10b |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 125°C |
| 灏佽/澶栨锛� | 28-SSOP锛�0.209"锛�5.30mm 瀵級 |
| 鍖呰锛� | 绠′欢 |
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PIC16(L)F1512/3
DS41624B-page 144
Preliminary
2012 Microchip Technology Inc.
TABLE 16-5:
ADC CLOCK PERIOD (TAD) VS. DEVICE OPERATING FREQUENCIES
FIGURE 16-6:
ANALOG-TO-DIGITAL SINGLE CONVERSION (ADDSEN = 0) TAD CYCLES
ADC Clock Period (TAD)
Device Frequency (FOSC)
ADC
Clock Source
ADCS<2:0>
20 MHz
16 MHz
8 MHz
4 MHz
1 MHz
Fosc/2
000
100 ns(2)
125 ns(2)
250 ns(2)
500 ns(2)
2.0
s
Fosc/4
100
200 ns(2)
250 ns(2)
500 ns(2)
1.0
s4.0 s
Fosc/8
001
400 ns(2)
0.5
s(2)
1.0
s2.0 s
8.0
s(3)
Fosc/16
101
800 ns
1.0
s2.0 s4.0 s
16.0
s(3)
Fosc/32
010
1.6
s2.0 s4.0 s
8.0
s(3)
32.0
s(3)
Fosc/64
110
3.2
s4.0 s
8.0
s(3)
16.0
s(3)
64.0
s(3)
FRC
x11
1.0-6.0
s(1,4)
1.0-6.0
s(1,4)
1.0-6.0
s(1,4)
1.0-6.0
s(1,4)
1.0-6.0
s(1,4)
Legend:
Shaded cells are outside of recommended range.
Note 1:
The FRC source has a typical TAD time of 1.6
s for VDD.
2:
These values violate the minimum required TAD time.
3:
For faster conversion times, the selection of another clock source is recommended.
4:
The ADC clock period (TAD) and total ADC conversion time can be minimized when the ADC clock is
derived from the system clock FOSC. However, the FRC clock source must be used when conversions are
to be performed with the device in Sleep mode.
TAD1 TAD2 TAD3 TAD4 TAD5 TAD6 TAD7 TAD8
TAD11
Set GO/DONE bit
Holding capacitor CHOLD is disconnected from analog input (typically 100 ns)
TAD9 TAD10
TCY - TAD
AADRES0H:AADRES0L is loaded,
ADIF bit is set,
Conversion starts
b0
b9
b6
b5
b4
b3
b2
b1
b8
b7
On the following cycle:
1-127 TINST
Pre-Charge
Acquisition/
Sharing Time
Time
Conversion Time
If ADPRE = 0
If ADACQ = 0
If ADPRE = 0
If ADACQ = 0
GO/DONE bit is cleared
(Traditional Timing of ADC Conversion)
External and Internal
Channels are
charged/discharged
External and Internal
Channels share
charge
(Traditional Operation Start)
(TPRE)
(TACQ)
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| VE-J5D-IW-F1 | CONVERTER MOD DC/DC 85V 100W |
| PIC12LF1840T-I/MF | MCU 7KB FLASH 256B RAM XLP 8DFN |
| VE-J3X-IW-F4 | CONVERTER MOD DC/DC 5.2V 100W |
| PIC12F1840T-I/MF | MCU 7KB FLASH 256B RAM XLP 8DFN |
| VE-J3W-IW-F1 | CONVERTER MOD DC/DC 5.5V 100W |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| PIC16F1512-I/MV | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB Flash 128B RAM 10-bit ADC RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC16F1512-I/SO | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB Flash 128B RAM 10-bit ADC RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC16F1512-I/SP | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB Flash 128B RAM 10-bit ADC RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC16F1512-I/SS | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB Flash 128B RAM 10-bit ADC RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC16F1512T-I/MV | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB Flash 128B RAM 10-bit ADC RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
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