711h AADCON0
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� PIC16F1512-E/SS
寤犲晢锛� Microchip Technology
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 212/348闋�(y猫)
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC MCU 8BIT 3.5KB FLASH 28-SSOP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 47
绯诲垪锛� PIC® XLP™ 16F
鏍稿績铏曠悊鍣細 PIC
鑺珨灏哄锛� 8-浣�
閫熷害锛� 20MHz
閫ｉ€氭€э細 I²C锛孡IN锛孲PI锛孶ART/USART
澶栧湇瑷�(sh猫)鍌欙細 娆犲妾㈡脯(c猫)/寰�(f霉)浣�锛孭OR锛孭WM锛學DT
杓稿叆/杓稿嚭鏁�(sh霉)锛� 25
绋嬪簭瀛樺劜(ch菙)鍣ㄥ閲忥細 3.5KB锛�2K x 14锛�
绋嬪簭瀛樺劜(ch菙)鍣ㄩ(l猫i)鍨嬶細 闁冨瓨
RAM 瀹归噺锛� 128 x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 2.3 V ~ 5.5 V
鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� A/D 17x10b
鎸暕鍣ㄥ瀷锛� 鍏�(n猫i)閮�
宸ヤ綔婧害锛� -40°C ~ 125°C
灏佽/澶栨锛� 28-SSOP锛�0.209"锛�5.30mm 瀵級
鍖呰锛� 绠′欢
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2012 Microchip Technology Inc.
Preliminary
DS41624B-page 29
PIC16(L)F1512/3
Bank 14
70ch
to
710h
鈥�
Unimplemented
鈥�
711h AADCON0(3)
鈥擟HS<4:0>
GO/DONE
ADON
-000 0000 -000 0000
712h AADCON1(3)
ADFM
ADCS<2:0>
鈥�
ADPREF<1:0>
0000 --00 0000 --00
713h AADCON2
鈥擳RIGSEL<2:0>
鈥�
-000 ---- -000 ----
714h AADCON3
ADEPPOL ADIPPOL
ADOLEN
ADOEN
ADOOEN
鈥�
ADIPEN
ADDSEN 0000 0-00 0000 0-00
715h AADSTAT
鈥�
ADCONV
ADSTG<1:0>
---- -000 ---- -000
716h AADPRE
鈥�
ADPRE<6:0>
-000 0000 -000 0000
717h AADACQ
鈥�
ADACQ<6:0>
-000 0000 -000 0000
718h AADGRD
GRDBOE GRDAOE GRDPOL
鈥�
000- ---- 000- ----
719h AADCAP
鈥�
ADDCAP<2:0>
---- -000 ---- -000
71Ah AADRES0L(3)
A/D Result 0 Register Low
xxxx xxxx uuuu uuuu
71Bh AADRES0H(3)
A/D Result 0 Register High
xxxx xxxx uuuu uuuu
71Ch AADRES1L
A/D Result 1 Register Low
xxxx xxxx uuuu uuuu
71Dh AADRES1H
A/D Result 1 Register High
xxxx xxxx uuuu uuuu
71Eh 鈥�
Unimplemented
鈥�
Bank 15-30
x0Ch
or
x8Ch
to
x1Fh
or
x9Fh
鈥�
Unimplemented
鈥�
Bank 31
F8Ch
to
FE3h
鈥�
Unimplemented
鈥�
FE4h STATUS_SHAD
鈥�
鈥擹
DC
C
---- -xxx ---- -uuu
FE5h WREG_SHAD
Working Register Shadow
xxxx xxxx uuuu uuuu
FE6h BSR_SHAD
鈥�
Bank Select Register Shadow
---x xxxx ---u uuuu
FE7h PCLATH_SHAD
鈥�
Program Counter Latch High Register Shadow
-xxx xxxx uuuu uuuu
FE8h FSR0L_SHAD
Indirect Data Memory Address 0 Low Pointer Shadow
xxxx xxxx uuuu uuuu
FE9h FSR0H_SHAD
Indirect Data Memory Address 0 High Pointer Shadow
xxxx xxxx uuuu uuuu
FEAh FSR1L_SHAD
Indirect Data Memory Address 1 Low Pointer Shadow
xxxx xxxx uuuu uuuu
FEBh FSR1H_SHAD
Indirect Data Memory Address 1 High Pointer Shadow
xxxx xxxx uuuu uuuu
FECh 鈥�
Unimplemented
鈥�
FEDh STKPTR
鈥�
Current Stack Pointer
---1 1111 ---1 1111
FEEh TOSL
Top of Stack Low Byte
xxxx xxxx uuuu uuuu
FEFh TOSH
鈥�
Top of Stack High Byte
-xxx xxxx -uuu uuuu
TABLE 3-9:
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addr
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on all
other
Resets
Legend:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as 鈥�0鈥�, r = reserved.
Shaded locations are unimplemented, read as 鈥�0鈥�.
Note
1:
PIC16F1512/3 only.
2:
Unimplemented, read as 鈥�1鈥�.
3:
This register is available in Bank 1 and Bank 14 under similar register names. See Section 16.5.1 鈥淎DC Register Mapping鈥�.
鐩搁棞(gu膩n)PDF璩囨枡
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PIC16F1512-I/MV 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB Flash 128B RAM 10-bit ADC RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
PIC16F1512-I/SO 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB Flash 128B RAM 10-bit ADC RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
PIC16F1512-I/SP 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB Flash 128B RAM 10-bit ADC RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
PIC16F1512-I/SS 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB Flash 128B RAM 10-bit ADC RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
PIC16F1512T-I/MV 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB Flash 128B RAM 10-bit ADC RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
鐧�(f膩)甯冪穵鎬ラ噰璩�(g貌u)锛�3鍒嗛悩宸﹀彸鎮ㄥ皣寰楀埌鍥炲京(f霉)銆�

閲囪臣(g貌u)闇€姹�

(鑻ュ彧閲囪臣(g貌u)涓€姊濆瀷铏�(h脿o)锛屽～瀵�(xi臎)涓€琛屽嵆鍙�)

鐧�(f膩)甯冩垚鍔燂紒鎮ㄥ彲浠ョ辜绾�(x霉)鐧�(f膩)甯冮噰璩�(g貌u)銆備篃鍙互閫�(j矛n)鍏ユ垜鐨勫悗鑷�(t谩i)锛屾煡鐪嬪牨(b脿o)鍍�(ji脿)

鐧�(f膩)甯冩垚鍔燂紒鎮ㄥ彲浠ョ辜绾�(x霉)鐧�(f膩)甯冮噰璩�(g貌u)銆備篃鍙互閫�(j矛n)鍏ユ垜鐨勫悗鑷�(t谩i)锛屾煡鐪嬪牨(b脿o)鍍�(ji脿)

*鍨嬭櫉(h脿o) *鏁�(sh霉)閲� 寤犲晢 鎵硅櫉(h脿o) 灏佽
娣诲姞鏇村閲囪臣(g貌u)

鎴戠殑鑱�(li谩n)绯绘柟寮�

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