參數(shù)資料
型號： PIC12F675
廠商： Microchip Technology Inc.
英文描述： 8-Pin, 8-Bit CMOS Enhanced FLASH Microcontroller with A/D Converter and EEPROM Data Memory(-2.5~5.5V,具ADC,閃速微控制器)
中文描述： 8引腳，8位閃存微控制器的CMOS增強(qiáng)與A / D轉(zhuǎn)換器和EEPROM數(shù)據(jù)存儲器（-2.5?5.5V的，具藝術(shù)發(fā)展局，閃速微控制器）
文件頁數(shù)： 85/170頁
文件大?。?/td> 4191K
代理商： PIC12F675
2003 Microchip Technology Inc.
Preliminary
DS40300C-page 83
PIC16F62X
12.4.2
USART SYNCHRONOUS MASTER
RECEPTION
Once Synchronous mode is selected, reception is
enabled
by
setting
either
(RCSTA<5>) or enable bit CREN (RCSTA<4>). Data is
sampled on the RB1/RX/DT pin on the falling edge of
the clock. If enable bit SREN is set, then only a single
word is received. If enable bit CREN is set, the recep-
tion is continuous until CREN is cleared. If both bits are
set, then CREN takes precedence. After clocking the
last bit, the received data in the Receive Shift Register
(RSR) is transferred to the RCREG register (if it is
empty). When the transfer is complete, interrupt flag bit
RCIF (PIR1<5>) is set. The actual interrupt can be
enabled/disabled by setting/clearing enable bit RCIE
(PIE1<5>). Flag bit RCIF is a read only bit which is
RESET by the hardware. In this case, it is RESET
when the RCREG register has been read and is empty.
The RCREG is a double buffered register (i.e., it is a
two-deep FIFO). It is possible for two bytes of data to
be received and transferred to the RCREG FIFO and a
third byte to begin shifting into the RSR register. On the
clocking of the last bit of the third byte, if the RCREG
register is still full then overrun error bit OERR
(RCSTA<1>) is set. The word in the RSR will be lost.
The RCREG register can be read twice to retrieve the
two bytes in the FIFO. Bit OERR has to be cleared in
software (by clearing bit CREN). If bit OERR is set,
transfers from the RSR to the RCREG are inhibited, so
it is essential to clear bit OERR if it is set. The 9th
enable
bit
SREN
receive bit is buffered the same way as the receive
data. Reading the RCREG register, will load bit RX9D
with a new value, therefore it is essential for the user to
read the RCSTA register before reading RCREG in
order not to lose the old RX9D information.
Steps to follow when setting up a Synchronous Master
Reception:
1.
Initialize the SPBRG register for the appropriate
baud rate. (Section 12.1)
2.
Enable the synchronous master serial port by
setting bits SYNC, SPEN, and CSRC.
3.
Ensure bits CREN and SREN are clear.
4.
If interrupts are desired, then set enable bit
RCIE.
5.
If 9-bit reception is desired, then set bit RX9.
6.
If a single reception is required, set bit SREN.
For continuous reception set bit CREN.
7.
Interrupt flag bit RCIF will be set when reception
is complete and an interrupt will be generated if
enable bit RCIE was set.
8.
Read the RCSTA register to get the ninth bit (if
enabled) and determine if any error occurred
during reception.
9.
Read the 8-bit received data by reading the
RCREG register.
10. If any error occurred, clear the error by clearing
bit CREN.
TABLE 12-10: REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER RECEPTION
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR
Value on all
other
RESETS
0Ch
PIR1
EEIF
CMIF
RCIF
TXIF
—
CCP1IF TMR2IF
TMR1IF
0000 -000
RX9D
0000 -00x
0000 0000
0000 -000
0000 -00x
0000 0000
-000 -000
0000 -010
0000 0000
18h
RCSTA
SPEN
RX9
SREN CREN
ADEN
FERR
OERR
1Ah
RCREG USART Receive Register
8Ch
PIE1
EEPIE
CMIE
RCIE
TXIE
—
CCP1IE TMR2IE TMR1IE
-000 0000
BRGH
TRMT
98h
TXSTA
CSRC
TX9
TXEN
SYNC
—
TX9D
0000 -010
0000 0000
99h
Legend:
x
= unknown,
-
= unimplemented read as '0'. Shaded cells are not used for Synchronous Master Reception.
SPBRG Baud Rate Generator Register
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PIC12F675 DEVELOPMENT BOARD KIT 功能描述:DEVELOPMENT BOARD FOR PIC12F675 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 過時(shí)/停產(chǎn)零件編號 系列:- 標(biāo)準(zhǔn)包裝:1 系列:*
PIC12F675 DEVELOPMENT KIT 功能描述:EMBEDDED C DEVELOPMENT KIT RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 過時(shí)/停產(chǎn)零件編號 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 傳感器類型:CMOS 成像，彩色（RGB） 傳感范圍:WVGA 接口:I²C 靈敏度:60 fps 電源電壓:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相關(guān)產(chǎn)品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP
PIC12F675 I/SN0547 制造商:Microchip Technology Inc 功能描述:
PIC12F675-E 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:8-Pin, Flash-Based 8-Bit CMOS Microcontrollers
PIC12F675-E/MD 功能描述:8位微控制器 -MCU 1.75KB 64 RAM 6I/O Ext Temp QFN RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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