- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄368020 > PI7C8154-33 PCI Bridge | 2-Port PCI-to-PCI Bridge PDF資料下載
參數(shù)資料
| 型號： | PI7C8154-33 |
| 英文描述： | PCI Bridge | 2-Port PCI-to-PCI Bridge |
| 中文描述： | PCI橋| 2端口PCI至PCI橋 |
| 文件頁數(shù)： | 95/115頁 |
| 文件大?。?/td> | 879K |
| 代理商： | PI7C8154-33 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁當前第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁
PI7C8150B
2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
Page 95 of 115
July 31, 2003 – Revision 1.031
14.1.39
GPIO DATA AND CONTROL REGISTER – OFFSET 64h
Bit
Function
Type
Description
Writing 1 to any of these bits drives the corresponding bit LOW on
the GPIO[3:0] bus if it is programmed as bidirectional. Data is
driven on the PCI clock cycle following completion of the
configuration write to this register. Bit positions corresponding to
GPIO pins that are programmed as input only are not driven. Writing
0 has no effect and will show last the last value written when read.
Reset to 0.
Writing 1 to any of these bits drives the corresponding bit HIGH on
the GPIO[3:0] bus if it is programmed as bidirectional. Data is
driven on the PCI clock cycle following completion of the
configuration write to this register. Bit positions corresponding to
GPIO pins that are programmed as input only are not driven. Writing
0 has no effect and will show last the last value written when read.
Reset to 0.
Writing 1 to and of these bits configures the corresponding
GPIO[3:0] pin as an input only. The output driver is tristated.
Writing 0 to this register has no effect and will reflect the last value
written when read.
Reset to 0.
Writing 1 to and of these bits configures the corresponding
GPIO[3:0] pin as bidirectional. The output driver is enabled and
drives the value set in the output data register (65h). Writing 0 to this
register has no effect and will reflect the last value written when read.
Reset to 0.
Reserved. Returns 0 when read. Reset to 0.
Reads the state of the GPIO[3:0] pins. The state is updated on the PCI
clock following a change in the GPIO[3:0] pins.
11:8
GPIO Output
Write-1-to-Clear
R/WC
15:12
GPIO Output
Write-1-to-Set
R/WS
19:16
GPIO Output
Enable Write-1-
to-Clear
R/WC
23:20
GPIO Output
Enable Write-1-
to-Set
R/WS
27:24
Reserved
GPIO Input Data
Register
R
31:28
R/O
14.1.40
SECONDARY CLOCK CONTROL REGISTER – OFFSET 68h
Bit
Function
Type
Description
If either bit is 0, then S_CLKOUT [0] is enabled.
If both bits are 1, then S_CLKOUT [0] is disabled.
If either bit is 0, then S_CLKOUT [1] is enabled.
If both bits are 1, then S_CLKOUT [1] is disabled.
If either bit is 0, then S_CLKOUT [2] is enabled.
If both bits are 1, then S_CLKOUT [2] is disabled.
If either bit is 0, then S_CLKOUT [3] is enabled.
If both bits are 1, then S_CLKOUT [3] is disabled.
If bit is 0, then S_CLKOUT [4] is enabled.
If bit is 1, then S_CLKOUT [4] is disabled and driven low.
If bit is 0, then S_CLKOUT [5] is enabled.
If bit is 1, then S_CLKOUT [5] is disabled and driven low.
If bit is 0, then S_CLKOUT [6] is enabled.
If bit is 1, then S_CLKOUT [6] is disabled and driven low.
If bit is 0, then S_CLKOUT [7] is enabled.
If bit is 1, then S_CLKOUT [7] is disabled and driven low.
If bit is 0, then S_CLKOUT [8] is enabled.
If bit is 1, then S_CLKOUT [8] is disabled and driven low.
If bit is 0, then S_CLKOUT [9] is enabled.
If bit is 1, then S_CLKOUT [9] is disabled and driven low.
Reserved. Returns 00 when read.
1:0
Clock 0 disable
R/W
3:2
Clock 1 disable
R/W
5:4
Clock 2 disable
R/W
7:6
Clock 3 disable
R/W
8
Clock 4 disable
R/W
9
Clock 5 disable
R/W
10
Clock 6 disable
R/W
11
Clock 7 disable
R/W
12
Clock 8 disable
R/W
13
Clock 9 disable
R/W
15:14
Reserved
RO
相關PDF資料 |
PDF描述 |
|---|---|
| PI7C8150 | PCI Bridge | 2-Port PCI-to-PCI Bridge |
| PI7C8150-33 | PCI Bridge | 2-Port PCI-to-PCI Bridge |
| PI7C8150A | PCI Bridge | 2-Port PCI-to-PCI Bridge |
| PI7C8150A-33 | PCI Bridge | 2-Port PCI-to-PCI Bridge |
| PI7C8150B | PCI Bridge | Asynchronous 2-Port PCI Bridge |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PI7C8154ANA | 功能描述:外圍驅動器與原件 - PCI 64-Bit/66MHz 2-Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C8154ANAE | 功能描述:外圍驅動器與原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C8154ANAE-33 | 功能描述:外圍驅動器與原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C8154B | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2 PORT 64 BIT 66MHZ PCI TO PCI BRIDGE |
| PI7C8154BNA | 制造商:Pericom Semiconductor Corporation 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。