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參數(shù)資料
| 型號(hào)： | PI74ALVCH162268 |
| 廠商： | Pericom Semiconductor Corp. |
| 英文描述： | 12-Bit To 24-Bit Registered Bus Exchanger |
| 中文描述： | 12位到24位注冊(cè)總線交換 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 257K |
| 代理商： | PI74ALVCH162268 |
1
PS8352 11/04/98
Product Description
Pericom Semiconductor’s PI74ALVCH series of logic circuits are
produced in the Company’s advanced 0.5 micron CMOS
technology, achieving industry leading speed.
This 12-bit to 24-bit registered bus exchanger is designed for 2.3V
to 3.6V V
cc
operation.
The PI74ALVCH162268 is used for applications in which data
must be transferred from a narrow high-speed bus to a wide, lower
frequency bus.
The device provides synchronous data exchange between the two
ports. Data is stored in the internal registers on the low-to-high
transition of the clock (CLK) input when the appropriate clock
enable (CLKEN) inputs are low. The select (SEL) line is
synchronous with CLK and selects 1B or 2B input data for the A
outputs.
For data transfer in the A-to-B direction, a two stage pipeline is
provided in the A-to-1B path, with a single storage register in the
A-to-2B path. Proper control of these inputs allows two sequential
12-bit words to be presented synchronously as a 24-bit word on the
B-port. Data flow is controlled by the active-low output enables
(OEA, OEB). These control terminals are registered so bus direction
changes are synchronous with CLK.
The B outputs, which are designed to sink up to 12mA, include
equivalent 26
resistors to reduce overshoot and undershoot.
To ensure the high-impedance state during power up or power
down, a clock pulse should be applied as soon as possible and OE
should be tied to V
CC
through a pullup resistor, the minimum value
of the resistor is determined by the current-sinking capability of
the driver. Because OE is being routed through a register, the
active state of the outputs cannot be determined prior to the arrival
of the first clock pulse.
Active bus-hold circuitry is provided to hold unused or floating
data inputs at a valid logic level.
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12-Bit To 24-Bit Registered Bus Exchanger
with 3-State Outputs
Product Features
PI74ALVCH162268 is designed for low voltage operation
V
CC
= 2.3V to 3.6V
Hysteresis on all inputs
Typical V
OLP
(Output Ground Bounce)
< 0.8V at V
CC
= 3.3V, T
A
= 25°C
Typical V
OHV
(Output V
OH
Undershoot)
< 2.0V at V
CC
= 3.3V, T
A
= 25°C
B-port outputs have equivalent 26
series resistors,
no external resistors are required.
Bus Hold retains last active bus state during 3-state
eliminates the need for external pullup resistors
Industrial operation at –40°C to +85°C
Packages available:
– 56-pin 240 mil wide plastic TSSOP (A56)
– 56-pin 300 mil wide plastic SSOP (V56)
Logic Block Diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PI74ALVCH16244 | 16-Bit Buffer Driver with 3-State Outputs |
| PI74ALVCH16244A | 16-Bit Buffer Driver with 3-State Outputs |
| PI74ALVCH16245 | 3.3V 16-Bit Bidirectional Transceiver with 3-State Outputs |
| PI74ALVCH16260 | 12-Bit To 24-Bit Multiplexed D-Type Latch with 3-State Outputs |
| PI74ALVCH16270 | 12-Bit To 24-Bit Registered Bus Exchanger with 3-State Outputs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PI74ALVCH162268A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Bus Exchanger |
| PI74ALVCH162268V | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Bus Exchanger |
| PI74ALVCH16240 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic | 16-Bit Inverting Buffer/Line Driver |
| PI74ALVCH16240A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Quad 4-Bit Buffer/Driver |
| PI74ALVCH16240V | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Quad 4-Bit Buffer/Driver |
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