參數(shù)資料
型號： PI6CU877NF
廠商： Pericom Semiconductor Corp.
英文描述： PLL Clock Driver for 1.8V DDR2 Memory
中文描述： PLL時鐘驅動器1.8V的DDR2內(nèi)存
文件頁數(shù)： 1/11頁
文件大小： 543K
代理商： PI6CU877NF
1
PS8689B 08/05/04
Description
PI6CU877 PLL clock driver is developed for Registered DDR2
DIMM applications with 1.8V operation and differential data input
and output levels.
The device is a zero delay buffer that distributes a differential
clock input pair (CLK, CLK) to eleven differential pairs of clock
outputs which includes feedback clock (Y[0:9], Y[0:9]; FBOUT,
FBOUT).
The clock outputs are controlled by CLK/CLK, FBOUT, FBOUT, the
LVCMOS (OE, OS) and the Analog Power input (AV
DD
). When
OE is LOW the outputs except FBOUT, FBOUT, are disabled while
the internal PLL continues to maintain its locked-in frequency.
OS is a program pin that must be tied to GND or V
DD.
When OS
is high, OE will function as described above. When OS is LOW,
OE has no effect on Y7/Y7, they are free running. When AV
DD
is
grounded, the PLL is turned off and bypassed for test purposes.
When CLK/CLK are logic low, the device will enter a low power
mode. An input logic detection circuit will detect the logic low level
and perform a low power state where all Y[0:9], Y[0:9]; FBOUT,
FBOUT, and PLL are OFF.
PI6CU877 is a high performance, low skew, and low jitter PLL
clock driver, and it is also able to track Spread Spectrum Clocking
(SSC) for reduced EMI.
Features
PLL clock distribution optimized for DDR2 SDRAM
applications.
Distributes one differential clock input pair to ten differential
clock output pairs.
Differential Inputs (CLK, CLK) and (FBIN, FBIN)
Input OE/OS: LVCMOS
Differential Outputs (Y[0:9], Y[0:9] and (FBOUT, FBOUT)
External feedback pins (FBIN, FBIN) are used to
synchronize the outputs to the clock input.
Operates at AV
DD
= 1.8V for core circuit and internal PLL,
and V
DDQ
= 1.8V for differential output drivers
Packaging (Pb-free & Green available):
– 52-ball VFBGA (NF)
Pin Configuration
PI6CU877
PLL Clock Driver for
1.8V DDR2 Memory
1
2
3
4
5
6
A
Y
1
Y
0
Y
0
Y
5
Y
5
Y
6
B
Y
1
GND
GND
GND
GND
Y
6
C
Y
2
GND
NB
NB
GND
Y
7
D
Y
2
V
DDQ
V
DDQ
V
DDQ
OS
Y
7
E
CK
V
DDQ
NB
NB
V
DDQ
FB
IN
F
CK
V
DDQ
NB
NB
OE
FB
IN
G
AGND
V
DDQ
V
DDQ
V
DDQ
V
DDQ
FB
OUT
H
AV
DD
GND
NB
NB
GND
FB
OUT
J
Y
3
GND
GND
GND
GND
Y
8
k
Y
3
Y
4
Y
4
Y
9
Y
9
Y
8
相關PDF資料
PDF描述
PI6CU877NFE PLL Clock Driver for 1.8V DDR2 Memory
PI6CVF857ZDE 1:10 PLL Clock Driver for 2.5V DDR-SDRAM Memory
PI6CVF857NF 1:10 PLL Clock Driver for 2.5V DDR-SDRAM Memory
PI6CVF857 1:10 PLL Clock Driver for 2.5V DDR-SDRAM Memory
PI6CVF857A 1:10 PLL Clock Driver for 2.5V DDR-SDRAM Memory
相關代理商/技術參數(shù)
參數(shù)描述
PI6CU877NFE 功能描述:鎖相環(huán) - PLL PLL Clock Driver for 1.8V DDR2 RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
PI6CU877NFEX 功能描述:鎖相環(huán) - PLL PLL Clock Driver for 1.8V DDR2 RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
PI6CU877NFX 制造商:Pericom Semiconductor Corporation 功能描述:Zero Delay PLL Clock Driver Single 125MHz to 300MHz 52-Pin VFBGA T/R
PI6CUA877NFE 功能描述:鎖相環(huán) - PLL PLL Clock Driver for 1.8V DDR2 RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
PI6CUA877NFEX 功能描述:鎖相環(huán) - PLL PLL Clock Driver for 1.8V DDR2 RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
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