參數(shù)資料
型號: PI6C557-05LE
廠商: Pericom
文件頁數(shù): 1/9頁
文件大小: 0K
描述: IC CLOCK GENERATOR 20-TSSOP
產(chǎn)品培訓(xùn)模塊: Total Timing Technology
標(biāo)準(zhǔn)包裝: 74
系列: PCI Express® (PCIe)
類型: 時鐘/頻率發(fā)生器
PLL:
主要目的: 以太網(wǎng),PCI Express(PCIe)
輸入: 時鐘,晶體
輸出: HCSL,LVDS
電路數(shù): 1
比率 - 輸入:輸出: 1:4
差分 - 輸入:輸出: 無/是
頻率 - 最大: 200MHz
電源電壓: 3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 管件
1
www.pericom.com
P-0.1
04/29/11
All trademarks are property of their respective owners.
Product Features
PCIe 2.0 complaint
→Phase jitter - 2.1ps RMS (typ)
LVDS compatible outputs
Supply voltage of 3.3V ±5%
25MHz crystal or clock input frequency
HCSL outputs, 0.7V Current mode differential pair
Jitter 40ps cycle-to-cycle (typ)
Spread of -0.5%, -1.0%, -1.5%, and no spread
Industrial temperature range
Spread Bypass option available
Spread and frequency selection via external pins
Packaging: (Pb-free and Green)
→20-pin, 173-mil wide TSSOP
Description
The PI6C557-05 is a spread spectrum clock generator compliant
to PCI Express 2.0 and Ethernet requirements. The device is
used for PC or embedded systems to substantially reduce Elec-
tromagnetic Interference (EMI).
The PI6C557-05 provides four differential (HCSL) or LVDS
spread spectrum outputs. The PI6C557-05 is configured to select
spread and clock selection. Using Pericom's patented Phase-
Locked Loop (PLL) techniques, the device takes a 25MHz crys-
tal input and produces four pairs of differential outputs (HCSL)
at 100MHz and 200MHz clock frequencies. It also provides
spread selection of -0.5%, -1.0%, -1.5%, and no spread.
Block Diagram
Pin Configuration
PLL
Crystal
Driver
VDD
GND
X1/CLK
X2
25 MHz
crystal
Spread
Spectrum/
Output
clock
selection
S[2:0] 3
CLK1
Rr(IREF)
CLK2
2
Pulling
Capacitors
SS Circuitry
CLK3
CLK0
OE
PD
or clock
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
CLK0
CLK1
GNDODA
VDDODA
CLK2
CLK3
VDDXD
S0
S1
S2
X1
X2
PD
OE
GNDXD
IREF
PI6C557-05
PCIe 2.0 Clock Generator with 4 HCSL Outputs
11-0063
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