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參數(shù)資料
| 型號(hào)： | PHX4N50E |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | JFETs |
| 英文描述： | PowerMOS transistor Isolated version of PHP4N50E |
| 中文描述： | 2.9 A, 500 V, 1.5 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 封裝： | SOT-186A, 3 PIN |
| 文件頁數(shù)： | 4/5頁 |
| 文件大?。?/td> | 24K |
| 代理商： | PHX4N50E |
Philips Semiconductors
Objective specification
PowerMOS transistor
PHX4N50E
MECHANICAL DATA
Dimensions in mm
Net Mass: 2 g
Fig.1. SOT186A; The seating plane is electrically isolated from all terminals.
Notes
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent
damage to MOS gate oxide.
2. Refer to mounting instructions for F-pack envelopes.
3. Epoxy meets UL94 V0 at 1/8".
10.3
max
3.2
3.0
4.6
max
2.9 max
2.8
seating
plane
6.4
15.8
max
0.6
2.5
2.54
5.08
1
2
3
3 max.
not tinned
3
0.5
2.5
0.9
0.7
M
0.4
15.8
max.
19
13.5
min.
Recesses (2x)
2.5
0.8 max. depth
1.0 (2x)
1.3
November 1996
4
Rev 1.000
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