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參數(shù)資料
| 型號(hào)： | PHX4N50E |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | JFETs |
| 英文描述： | PowerMOS transistor Isolated version of PHP4N50E |
| 中文描述： | 2.9 A, 500 V, 1.5 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 封裝： | SOT-186A, 3 PIN |
| 文件頁(yè)數(shù)： | 3/5頁(yè) |
| 文件大?。?/td> | 24K |
| 代理商： | PHX4N50E |
Philips Semiconductors
Objective specification
PowerMOS transistor
PHX4N50E
DYNAMIC CHARACTERISTICS
T
j
= 25 C unless otherwise specified
SYMBOL
PARAMETER
g
fs
Forward transconductance
C
iss
Input capacitance
C
oss
Output capacitance
C
rss
Feedback capacitance
Q
g(tot)
Total gate charge
Q
gs
Gate to source charge
Q
gd
Gate to drain (Miller) charge
t
d on
Turn-on delay time
t
r
Turn-on rise time
t
d off
Turn-off delay time
t
f
Turn-off fall time
t
rr
Source-drain diode reverse
recovery time
Q
rr
Source-drain diode reverse
recovery charge
L
d
Internal drain inductance
CONDITIONS
V
DS
= 15 V; I
D
= 2.65 A
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz
MIN.
1.5
-
-
-
-
-
-
-
-
-
-
-
TYP.
2.5
750
90
40
35
4
16
10
45
100
40
1200
MAX.
-
1000
140
70
-
-
-
45
60
140
65
-
UNIT
S
pF
pF
pF
nC
nC
nC
ns
ns
ns
ns
ns
V
GS
= 10 V; I
D
= 5.3 A; V
DS
= 400 V
V
DD
= 30 V; I
D
= 2.6 A;
V
GS
= 10 V; R
GS
= 50
;
R
GEN
= 50
I
F
= 5.3 A; -dI
F
/dt = 100 A/
μ
s;
V
GS
= 0 V; V
R
= 100 V
-
6
-
μ
C
Measured from drain lead 6 mm
from package to centre of die
Measured from source lead 6 mm
from package to source bond pad
-
4.5
-
nH
L
s
Internal source inductance
-
7.5
-
nH
November 1996
3
Rev 1.000
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