- 您現在的位置：買賣IC網 > PDF目錄367934 > PH28F640L18T85 (INTEL CORP) StrataFlash Wireless Memory PDF資料下載
參數資料
| 型號： | PH28F640L18T85 |
| 廠商： | INTEL CORP |
| 元件分類： | PROM |
| 英文描述： | StrataFlash Wireless Memory |
| 中文描述： | 4M X 16 FLASH 1.8V PROM, 85 ns, PBGA56 |
| 封裝： | 0.75 MM PITCH, LEAD FREE, VFBGA-56 |
| 文件頁數： | 83/106頁 |
| 文件大?。?/td> | 1272K |
| 代理商： | PH28F640L18T85 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁當前第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁
Intel StrataFlash Wireless Memory (L18)
Datasheet
Intel StrataFlash Wireless Memory (L18)
Order Number: 251902, Revision: 009
April 2005
83
Notes:
1.
"Illegal commands" include commands outside of the allowed command set (allowed commands: 40H
[pgm], 20H [erase], etc.)
If a "Read Array" is attempted from a busy partition, the result will be invalid data. The ID and Query
data are located at different locations in the address map.
1st and 2nd cycles of "2 cycles write commands" must be given to the same partition address, or
unexpected results will occur.
To protect memory contents against erroneous command sequences, there are specific instances in a
multi-cycle command sequence in which the second cycle will be ignored. For example, when the
device is program suspended and an erase setup command (0x20) is given followed by a confirm/
2.
3.
4.
Figure 38.
Write State Machine—Next State Table (Sheet 6 of 6)
OTP Busy
BP Busy,
Word Program
Busy,
Erase Busy,
BP Busy
BP Busy in Erase
Suspend
Word Pgm
Suspend,
Word Pgm Busy in
Erase Suspend,
Pgm Suspend In
Erase Suspend
BEFP Setup,
BEFP Pgm & Verify
Busy,
Erase Setup,
OTP Setup,
BP:
Setup
, Load 1,
Load 2, Confirm,
Word Pgm Setup,
Word Pgm Setup in
Erase Susp,
BP Setup, Load1,
Load 2, Confirm in
Erase Suspend
Current chip state
Ready,
Erase Suspend,
BP Suspend
Lock/CR Setup,
Lock/CR Setup in
Erase Susp
OTP
Setup
(4)
Lock
Block
Confirm
(8)
Lock-Down
Block
Confirm
(8)
Write CR
Confirm
(8)
Block Address
(WA0)
Illegal Cmds or
BEFP Data
(1)
(C0H)
(01H)
(2FH)
(03H)
(FFFFH)
(all other codes)
WSM
Operation
Completes
Output does
not change.
Array
Read
Status Read
Array Read
Output does not
change.
Output does not change.
Status
Read
Status Read
Status Read
Command Input to Chip and resulting
Output
Mux Next State
Output
Next State Table
相關PDF資料 |
PDF描述 |
|---|---|
| PH2907A | PNP switching transistor |
| PH2907 | PNP switching transistor |
| PH2931-135S | Rail-to-Rail, Very Low Noise Universal Dual Filter Building Block; Package: SO; No of Pins: 16; Temperature Range: -40°C to +85°C |
| PH2931-I3 | Radar Pulsed Power Transistor, 135W, 20ms Pulse, 1% Duty 2.9 - 3.1 GHz |
| PH2931-20M | Radar Pulsed Power Transistor, 20W,100ms Pulse, 10% Duty 2.9-3.1 GHz |
相關代理商/技術參數 |
參數描述 |
|---|---|
| PH28F640W18BD60 | 制造商:Micron Technology Inc 功能描述:PH28F640W18BD60S L785 |
| PH28F640W18BD60B | 制造商:Micron Technology Inc 功能描述:NUMPH28F640W18BD60B PH28F640W18BD60S L78 |
| PH28F640W18TE60B | 制造商:Micron Technology Inc 功能描述:64MB, CRYSTAL .75 VFBGA 1.8 LF - Tape and Reel |
| PH28F640W30BD70A | 制造商:Micron Technology Inc 功能描述:NOR Flash Parallel/Serial 1.8V 64Mbit 4M x 16bit 70ns 56-Pin VFBGA Tray 制造商:Micron Technology Inc 功能描述:NUMPH28F640W30BD70A MM#862859FLASH 28F64 |
| PH2-8-SGA | 制造商:Adam Technologies Inc 功能描述:PH2 Series Dual Row 8 Position Straight 2.54 mm Centerline Pin Header |
發(fā)布緊急采購，3分鐘左右您將得到回復。