參數(shù)資料
型號: PH28F256L18B85
廠商: INTEL CORP
元件分類: PROM
英文描述: StrataFlash Wireless Memory
中文描述: 16M X 16 FLASH 1.8V PROM, 85 ns, PBGA79
封裝: 0.75 MM PITCH, LEAD FREE, VFBGA-79
文件頁數(shù): 84/106頁
文件大?。?/td> 1272K
代理商: PH28F256L18B85
Intel StrataFlash Wireless Memory (L18)
April 2005
84
Intel StrataFlash Wireless Memory (L18)
Order Number: 251902, Revision: 009
Datasheet
resume command (0xD0), the second command will be ignored because it is unclear whether the user
intends to erase the block or resume the program operation.
The Clear Status command only clears the error bits in the status register if the device is not in the
following modes: WSM running (Pgm Busy, Erase Busy, Pgm Busy In Erase Suspend, OTP Busy, BEFP
modes).
BEFP writes are only allowed when the status register bit #0 = 0, or else the data is ignored.
The "current state" is that of the "chip" and not of the "partition"; Each partition "remembers" which
output (Array, ID/CFI or Status) it was last pointed to on the last instruction to the "chip", but the next
state of the chip does not depend on where the partition's output mux is presently pointing to.
Confirm commands (Lock Block, Unlock Block, Lock-Down Block, Configuration Register) perform the
operation and then move to the Ready State.
WA0 refers to the block address latched during the first write cycle of the current operation.
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