參數(shù)資料
型號： PF48F4P0VB00
廠商： Intel Corp.
英文描述： Photoelectric Sensor; Sensor Input Type:Optical; Sensing Range Max:43mm; Sensor Output Type:Relay; Leaded Process Compatible:No; Output Type:Relay; Peak Reflow Compatible (260 C):No; Contact Current Max:3A; Contact Rating:3A
中文描述： 英特爾StrataFlash嵌入式存儲器
文件頁數(shù)： 69/102頁
文件大?。?/td> 1609K
代理商： PF48F4P0VB00
1-Gbit P30 Family
Datasheet
Intel StrataFlash
Embedded Memory (P30)
Order Number: 306666, Revision: 001
April 2005
69
13.0
Security Modes
The device features security modes used to protect the information stored in the flash memory
array. The following sections describe each security mode in detail.
13.1
Block Locking
Individual instant block locking is used to protect user code and/or data within the flash memory
array. All blocks power up in a locked state to protect array data from being altered during power
transitions. Any block can be locked or unlocked with no latency. Locked blocks cannot be
programmed or erased; they can only be read.
Software-controlled security is implemented using the Block Lock and Block Unlock commands.
Hardware-controlled security can be implemented using the Block Lock-Down command along
with asserting WP#. Also, V
PP
data security can be used to inhibit program and erase operations
(see
Section 11.6, “Program Protection” on page 66
and
Section 12.4, “Erase Protection” on
page 68
).
The P30 device also offers four pre-defined areas in the main array that can be configured as One-
Time Programmable (OTP) for the highest level of security. These include the four 32 KB
parameter blocks together as one and the three adjacent 128 KB main blocks. This is available for
top or bottom parameter devices.
13.1.1
Lock Block
To lock a block, issue the Lock Block Setup command. The next command must be the Lock Block
command issued to the desired block’s address (see
Section 9.2, “Device Commands” on page 50
and
Figure 46, “Block Lock Operations Flowchart” on page 91
). If the Set Read Configuration
Register command is issued after the Block Lock Setup command, the device configures the RCR
instead.
Block lock and unlock operations are not affected by the voltage level on V
PP
. The block lock bits
may be modified and/or read even if V
PP
is at or below V
PPLK
.
13.1.2
Unlock Block
The Unlock Block command is used to unlock blocks (see
Section 9.2, “Device Commands” on
page 50
). Unlocked blocks can be read, programmed, and erased. Unlocked blocks return to a
locked state when the device is reset or powered down. If a block is in a lock-down state, WP#
must be deasserted before it can be unlocked (see
Figure 32, “Block Locking State Diagram” on
page 70
).
13.1.3
Lock-Down Block
A locked or unlocked block can be locked-down by writing the Lock-Down Block command
sequence (see
Section 9.2, “Device Commands” on page 50
). Blocks in a lock-down state cannot
be programmed or erased; they can only be read. However, unlike locked blocks, their locked state
cannot be changed by software commands alone. A locked-down block can only be unlocked by
issuing the Unlock Block command with WP# deasserted. To return an unlocked block to locked-
相關(guān)PDF資料
PDF描述
PF48F0P0VT00 Intel StrataFlash Embedded Memory
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PF48F3P0VT00 Intel StrataFlash Embedded Memory
PF48F4P0VT00 Intel StrataFlash Embedded Memory
PF48F0P0ZB00 Intel StrataFlash Embedded Memory
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PF48F4P0VBQ0 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel StrataFlash Embedded Memory
PF48F4P0VT00 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel StrataFlash Embedded Memory
PF48F4P0VTQ0 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel StrataFlash Embedded Memory
PF48F4P0ZB00 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel StrataFlash Embedded Memory
PF48F4P0ZBQ0 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel StrataFlash Embedded Memory
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