參數(shù)資料
型號： PEF3065NV3.2
廠商： SIEMENS AG
元件分類： Codec
英文描述： Signal Processing Subscriber Line Interface Codec Filter SLICOF
中文描述： 信號處理用戶線路接口編解碼器SLICOF
文件頁數(shù)： 27/102頁
文件大?。?/td> 563K
代理商： PEF3065NV3.2
PEB 3065
PEF 3065
Programming the SLICOFI
Semiconductor Group
27
01.98
SCR1 Configuration Register 1
Configuration register SCR1 defines the basic feeding modes of the SLICOFI and
enables/disables test features:
Reset value: 00
H
PD
SLICOFI is set either in Power Down or Power Denial mode together
with CIDD-bits CIDD6,7 (see
chapter
6
).
PD = 0
SLICOFI set to Power Denial mode; line supervision via
V
LINE1, 2
PD = 1
SLICOFI set to Power Down mode
SLICOFI is in normal or Boosted Battery mode (see
chapter 6.5
).
N/BB = 0
Normal feeding
N/BB = 1
Changes ternary interface to HV-SLIC which sets the
HV-SLIC to Boosted Battery mode
Handling of Loop Back functions for on chip test loops
LB = 0
normal function
LB = 1
the desired Loop Back function (analog or digital) is
enabled (selected by SCR6, together with the
TM-bit (SCR2-3))
Enables programmable Test Tone Generator 1
ETG1 = 0
Test Tone Generator 1 is disabled
ETG1 = 1
Test Tone Generator 1 is enabled
For HV-SLIC test function
HI-b = 0
normal operation
HI-b = 1
changes ternary Interface to HV-SLIC which sets the
b-leg of the line into high impedance state
For HV-SLIC test function
HI-a = 0
normal operation
HI-a = 1
changes ternary Interface to HV-SLIC which sets the
a-leg of the line into high impedance state
Disable Transmit Highpass for test reasons (see
chapter 10.3
)
DHP-X = 0
Transmit Highpass Filter is enabled
DHP-X = 1
Transmit Highpass Filter is disabled
Cut Off Receive Path for test reasons (see
chapter 10.3
)
COR = 0
Receive Path transmission is available
COR = 1
Receive Path is disabled
N/BB
LB
ETG1
HI-b
HI-a
DHP-X
COR
Bit
7
6
5
4
3
2
1
0
PD
N/BB
LB
ETG1
HI-b
HI-a
DHP-X
COR
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