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| 型號(hào)： | PEF24901 |
| 英文描述： | ISDN LINE INTERFACE|BASIC|CMOS|QFP|64PIN|PLASTIC |
| 中文描述： | 綜合業(yè)務(wù)數(shù)字網(wǎng)線接口|基本|的CMOS | QFP封裝| 64管腳|塑料 |
| 文件頁(yè)數(shù)： | 50/73頁(yè) |
| 文件大?。?/td> | 1618K |
| 代理商： | PEF24901 |
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PEB 2466
PEF 2466
Programming Overview
Hardware Reference Manual
41
2001-02-20
6.1.3
CRAM Structure
Coefficient RAM (CRAM) is used to store the individual coefficients calculated for each
channel. The coefficients can be written and read through the Microcontroller Interface.
The IM, FRX, FRR, AX, AR, TG1, TG2, and TH coefficients are accessed through the
Coefficient Operation (COP) Command Sequences which include the channel address
(see
Programmer’s Reference Manual
Chapter 6.5
).
Channel-specific coefficients always belong to their designated channel. Common
coefficients (TH) can be assigned to any of the four channels through field TH-SEL in
CR0 (see
Figure 25
).
Figure 25
Channel-Specific and Common Coefficients
Table 31
Coefficient RAM (CRAM) Structure per Channel
IM Part 1
IM Part 2
8 Coefficient Bytes
8 Coefficient Bytes
8 Coefficient Bytes
8 Coefficient Bytes
FRX
FRR
AX
AR
TG1
TG2
4 Coefficient Bytes
4 Coefficient Bytes
4 Coefficient Bytes
4 Coefficient Bytes
Common Coefficients
C
C
Set 1
TH Part
1, 2, 3
Set 2
TH Part
1, 2, 3
Set 3
TH Part
1, 2, 3
Set 4
TH Part
1, 2, 3
C
C
Channel 1
IM Part 1 & 2,
FRX, FRR,
AX, AR,
TG1, TG2
Channel 2
IM Part 1 & 2,
FRX, FRR,
AX, AR,
TG1, TG2
Channel 3
IM Part 1 & 2,
FRX, FRR,
AX, AR,
TG1, TG2
Channel 4
IM Part 1 & 2,
FRX, FRR,
AX, AR,
TG1, TG2
2466_226
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