- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378048 > PEB2466-HV1.2 (SIEMENS A G) Four Channel Codec Filter with PCM- and m-Controller Interface SICOFI4-mC PDF資料下載
參數(shù)資料
| 型號： | PEB2466-HV1.2 |
| 廠商： | SIEMENS A G |
| 元件分類： | 編解碼器 |
| 英文描述： | Four Channel Codec Filter with PCM- and m-Controller Interface SICOFI4-mC |
| 中文描述： | A/MU-LAW, PCM CODEC, PQFP64 |
| 文件頁數(shù)： | 46/82頁 |
| 文件大?。?/td> | 3330K |
| 代理商： | PEB2466-HV1.2 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁當前第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁
PEB 2466
Programming the SICOFI
-4-
μ
C
Semiconductor Group
46
02.97
3.5.6
This register contains additional configuration items valid for all 4 channels
XR5 Extended Register 5
1)
A crash occurs, if 2 or more channels are programed to transmit (talk) in the same time slot on the same
highway. In this case the crash-bit will be set, and transmission will be disabled for all affected channels.
Bit 7
0
MCLK-SEL
CRSH_A CRSH_B
CHCLK2
Version
MCLK-SEL
Selects Master Clock frequency, that has to be applied to pin MCLK
The MCLK signal has to synchronous to the 8 kHz FSC-signal.
0 0:
1536 kHz selected
0 1:
2048 kHz selected
1 0:
4096 kHz selected
1 1:
8192 kHz selected
CRSH_A
Crash
1)
on PCM-highway A (line DXA)
0:
No crash detected
1:
Crash detected (bad programming in CR5-registers)
CRSH_B
Crash on PCM-highway B (line DXB)
0:
No crash detected
1:
Crash detected (bad programming in CR5-registers)
CHCLK2
Enables Chopper Clock Output to pin CHCLK2
0 0:
pin CHCLK2 is set to 1
0 1:
A 512 kHz signal is fed to pin CHCLK2
1 0:
A 256 kHz signal is fed to pin CHCLK2
1 1:
A 16384 kHz signal (internal masterclock) is fed to pin
CHCLK2
(at least one of the four channels has to be set to
‘POWER UP’)
VERSION
This two bit field identifies the actual chip version,
is ‘00’ for Version 1.1, and ‘01’ for Version 1.2
相關PDF資料 |
PDF描述 |
|---|---|
| PEB24902 | Quad ISDN Echocancellation Circuit Analogue Front End Quad IEC AFE |
| PEB3065 | Signal Processing Subscriber Line Interface Codec Filter SLICOF |
| PEB3065NV3.2 | Signal Processing Subscriber Line Interface Codec Filter SLICOF |
| PEF3065NV3.2 | Signal Processing Subscriber Line Interface Codec Filter SLICOF |
| PEB3086 | ISDN SUBSCRIBER ACCESS CONTROLLER |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PEB2466HV2.2 | 功能描述:接口—CODEC POTS RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| PEB2466-HV2.2 | 制造商:Infineon Technologies AG 功能描述:PCM CODEC, Quad, 64 Pin, Plastic, QFP |
| PEB2466HV2.2/TR | 制造商:Lantiq 功能描述: |
| PEB2466HV2.2TR | 制造商:Rochester Electronics LLC 功能描述: 制造商:Infineon Technologies AG 功能描述: |
| PEB2466HV22XP | 制造商:Lantiq 功能描述:ICS FOR COMMUNICATIONS |
發(fā)布緊急采購，3分鐘左右您將得到回復。