參數(shù)資料
型號(hào)： PDI1394P11
廠商： NXP SEMICONDUCTORS
元件分類： 網(wǎng)絡(luò)接口
英文描述： 3-port physical layer interface
中文描述： DATACOM, INTERFACE CIRCUIT, PQFP64
封裝： 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, SOT-314-2, LQFP-64
文件頁數(shù)： 10/42頁
文件大?。?/td> 233K
代理商： PDI1394P11
Philips Semiconductors
Preliminary data
PDI1394P23
2-port/1-port 400 Mbps physical layer interface
2001 Sep 06
10
The LPS input is considered inactive if it remains low for more than
2.6
μ
s and is considered active otherwise. When the PDI1394P23
detects that LPS is inactive, it will place the PHY-LLC interface into a
low-power reset state in which the CTL and D outputs are held in the
logic zero state and the LREQ input is ignored; however, the
SYSCLK output remains active. If the LPS input remains low for
more than 26
μ
s, the PHY–LLC interface is put into a low-power
disabled state in which the SYSCLK output is also held inactive. The
PHY-LLC interface is also held in the disabled state during hardware
reset. The PDI1394P23 will continue the necessary repeater
functions required for normal network operation regardless of the
state of the PHY-LLC interface. When the interface is in the reset or
disabled state and LPS is again observed active, the PHY will
initialize the interface and return it to normal operation.
The PHY uses the C/LKON terminal to notify the LLC to power up
and become active. When activated, the C/LKON signal is a square
wave of approximately 163 ns period. The PHY activates the
C/LKON output when the LLC is inactive and a wake-up event
occurs. The LLC is considered inactive when either the LPS input is
inactive, as described above, or the LCtrI bit is cleared to 0. A
wake-up event occurs when a link-on PHY packet addressed to this
node is received, or conditionally when a PHY interrupt occurs. The
PHY deasserts the C/LKON output when the LLC becomes active
(both LPS active and the LCtrl bit set to 1). The PHY also deasserts
the C/LKON output when a bus-reset occurs unless a PHY interrupt
condition exists which would otherwise cause C/LKON to be active.
8.0
In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V).
ABSOLUTE MAXIMUM RATINGS
1
SYMBOL
PARAMETER
CONDITION
LIMITS
UNIT
MIN
MAX
V
DD
V
I
V
I
–5V
V
O
DC supply voltage
–0.5
4.0
V
DC input voltage
–0.5
V
DD
+0.5
5.5
V
5 volt tolerant input voltage range
–0.5
V
DC output voltage range at any output
–0.5
V
DD
+0.5
2
V
Electrostatic discharge
Human Body Model
—
kV
Machine Model
—
200
V
T
amb
T
stg
Operating free-air temperature range
0
+70
°
C
°
C
Storage temperature range
–65
+150
NOTE:
1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under “Recommended Operating
Conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
相關(guān)PDF資料
PDF描述
PDI1394P11BD 3-port physical layer interface
PDI1394P25 1-port 400 Mbps physical layer interface
PDI1394P25BD 1-port 400 Mbps physical layer interface
PDI1394P25EC 1-port 400 Mbps physical layer interface
PDI1394P23BD 2-port/1-port 400 Mbps physical layer interface
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PDI1394P11A 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:3-port physical layer interface
PDI1394P11ABD 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:3-port physical layer interface
PDI1394P11ABD-S 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Transceiver
PDI1394P11BD 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:3-port physical layer interface
PDI1394P11BD-S 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Transceiver
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*