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參數(shù)資料
| 型號(hào)： | PCI7610LQFP |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | PC Card, UltraMedia, and Integrated 1394a-2000 OHCI Two-Port PHY/Link-Layer Controller |
| 中文描述： | PC卡，UltraMedia和集成1394 - 2000 OHCI的雙端口的PHY /鏈路層控制器 |
| 文件頁(yè)數(shù)： | 66/240頁(yè) |
| 文件大?。?/td> | 1298K |
| 代理商： | PCI7610LQFP |
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324
Table 316. Requirements for Internal/External 1.8-V Core Power Supply
SUPPLY
VCC
3.3 V
VR_EN
VR_PORT
NOTE
Internal 1.8-V LDO-VR is enabled. A 1.0-
μ
F bypass capacitor is required on the VR_PORT
terminal for decoupling. This output is not for external use.
Internal
GND
1.8-V output
External
3.3 V
VCC
1.8-V input
Internal 1.8-V LDO-VR is disabled. An external 1.8-V power supply, of minimum 50-mA
capacity, is required. A 0.1-
μ
F bypass capacitor on the VR_PORT terminal is required.
3.9.3
CardBus (Function 0) Clock Run Protocol
The PCI CLKRUN feature is the primary method of power management on the PCI interface of the PCI7610 controller.
CLKRUN signaling is provided through the MFUNC6 terminal. Since some chip sets do not implement CLKRUN, this
is not always available to the system designer, and alternate power-saving features are provided. For details on the
CLKRUN protocol see the
PCI Mobile Design Guide
.
The PCI7610 controller does not permit the central resource to stop the PCI clock under any of the following
conditions:
Bit 1 (KEEPCLK) in the system control register (PCI offset 80h, see Section 4.30) is set.
The 16-bit PC Card resource manager is busy.
The PCI7610 CardBus master state machine is busy. A cycle may be in progress on CardBus.
The PCI7610 master is busy. There may be posted data from CardBus to PCI in the PCI7610 controller.
Interrupts are pending.
The CardBus CCLK for the socket has not been stopped by the PCI7610 CCLKRUN manager.
Bit 0 (KEEP_PCLK) in the miscellaneous configuration register (PCI offset F0h, see Section 7.23) is set.
The 1394 resource manager is busy.
The PCI7610 1394 master state machine is busy. A cycle may be in progress on 1394.
The PCI7610 master is busy. There may be posted data from the 1394 bus to PCI in the PCI7610 controller.
Interrupts are pending.
The 1394 bus is not idle.
The PCI7610 controller restarts the PCI clock using the CLKRUN protocol under any of the following conditions:
A 16-bit PC Card IREQ or a CardBus CINT has been asserted by either card.
A CardBus CBWAKE (CSTSCHG) or 16-bit PC Card STSCHG/RI event occurs in the socket.
A CardBus attempts to start the CCLK using CCLKRUN.
A CardBus card arbitrates for the CardBus bus using CREQ.
A 1394 device changes the status of the twisted pair lines from idle to active.
3.9.4
CardBus PC Card Power Management
The PCI7610 controller implements its own card power-management engine that can turn off the CCLK to a socket
when there is no activity to the CardBus PC Card. The PCI clock-run protocol is followed on the CardBus CCLKRUN
interface to control this clock management.
3.9.5
16-Bit PC Card Power Management
The COE bit (bit 7) of the ExCA power control register (ExCA offset 02h/42h/802h, see Section 5.3) and PWRDWN
bit (bit 0) of the ExCA global control register (ExCA offset 1Eh/5Eh/81Eh, see Section 5.20) are provided for 16-bit
PC Card power management. The COE bit places the card interface in a high-impedance state to save power. The
power savings when using this feature are minimal. The COE bit resets the PC Card when used, and the PWRDWN
bit does not. Furthermore, the PWRDWN bit is an automatic COE, that is, the PWRDWN performs the COE function
when there is no card activity.
NOTE:
The 16-bit PC Card must implement the proper pullup resistors for the COE and
PWRDWN modes.
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| PCI7610PDV | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI Integ PC Card Smart Card Flash media RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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| PCI7612ZHK | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI Sngl Socket CardBus Controller RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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