參數(shù)資料
型號(hào)： PCI1510GVF
廠商： Texas Instruments, Inc.
英文描述： PC CARD CONTROLLERS
中文描述： PC卡控制器
文件頁(yè)數(shù)： 108/128頁(yè)
文件大小： 735K
代理商： PCI1510GVF
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518
5.20 ExCA Global Control Register
The host interrupt mode bits in this register are retained for Intel 82365SL-DF compatibility. See Table 515 for a
complete description of the register contents.
Bit
7
6
5
4
3
2
1
0
Default
0
0
0
0
0
0
0
0
Register:
Offset:
Type:
Default:
ExCA global control
CardBus socket address + 81Eh; ExCA offset 1Eh
Read-only, Read/Write
00h
Table 515. ExCA Global Control Register Description
BIT
SIGNAL
TYPE
FUNCTION
75
RSVD
R
Reserved. Bits 75 return 000b when read.
4
INTMODEB
RW
Level/edge interrupt mode select card B. Bit 4 selects the signaling mode for the controller host interrupt
for card B interrupts. This bit is encoded as:
0 = Host interrupt is edge mode (default)
1 = Host interrupt is level mode
3
INTMODEA
RW
Level/edge interrupt mode select card A. Bit 3 selects the signaling mode for the controller host interrupt
for card A interrupts. This bit is encoded as:
0 = Host interrupt is edge mode (default)
1 = Host interrupt is level mode
2
IFCMODE
RW
Interrupt flag clear mode select. Bit 2 selects the interrupt flag clear mechanism for the flags in the ExCA
card status change register (ExCA offset 04h/44h/804h, see Section 5.5). This bit is encoded as:
0 = Interrupt flags are cleared by read of CSC register (default)
1 = Interrupt flags are cleared by explicit writeback of 1b
1
CSCMODE
RW
Card status change level/edge mode select. Bit 1 selects the signaling mode for the controller host interrupt
for card status changes. This bit is encoded as:
0 = Host interrupt is edge mode (default)
1 = Host interrupt is level mode
0
PWRDWN
RW
Power-down mode select. When bit 0 is set to 1b, the controller is in power-down mode. In power-down
mode, the controller card outputs are high-impedance until an active cycle is executed on the card interface.
Following an active cycle, the outputs are again high-impedance. The controller still receives functional
interrupts and/or card status-change interrupts; however, an actual card access is required to wake up the
interface. This bit is encoded as:
0 = Power-down mode is disabled (default)
1 = Power-down mode is enabled
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