參數(shù)資料
型號(hào)： PCE84C882
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 微控制器/微處理器
英文描述： Microcontroller for monitor OSD and auto-sync applications(監(jiān)視器屏幕顯示和自動(dòng)同步應(yīng)用的微控制器)
中文描述： 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PDIP42
封裝： 0.600 INCH, PLASTIC, SDIP-42
文件頁(yè)數(shù)： 32/60頁(yè)
文件大?。?/td> 409K
代理商： PCE84C882
1996 Jan 08
32
Philips Semiconductors
Preliminary specification
Microcontroller for monitor OSD
and auto-sync applications
PCE84C882
12.2
Derivative Register 23
This register selects the output polarity of the PWM outputs and also enables and selects the VSYNCN interrupt.
Table 19
Derivative Register 23
Table 20
Description of Derivative Register 23 bits
7
6
5
4
3
2
1
0
VINT
VIEN
P8LVL
P7LVL
P6LVL
BIT
SYMBOL
DESCRIPTION
7
VINT
VSYNCN/SIO interrupt indication bit. This bit indicates which of the two possible
interrupt sources, the Vsync signal (at the VSYNCN pin) or the SIO, generated the
interrupt. The interrupt causes the program to jump to the I
2
C interrupt subroutine at
address 05H. If VINT = 1; then the interrupt was generated by Vsync. If VINT = 0; then
the I
2
C-bus generated the interrupt. This bit must be reset after the interrupt has been
serviced, otherwise additional unwanted interrupts will be generated.
VSYNCN interrupt enable bit. When the SIO interrupt is enabled and VIEN = 1; the
Vsync signal (at the VSYNCN pin) will generate an interrupt to the CPU. The VSYNCN
interrupt is edge-triggered and can be selected to become active, using the Vp bit in
Register 34, on the rising or falling edge of the Vsync signal. In order to generate a
VSYNCN interrupt at the start of the vertical back tracing period, the Vp bit must be set
correctly; see Section 12.4. The VSYNCN interrupt and the I
2
C-bus interrupt share the
same interrupt vector.
These three bits are reserved.
6
VIEN
5
4
3
2
P8LVL
Polarity select bit for output PWM8. When P8LVL = 0; the PWM8 output is not inverted.
When P8VL = 1; the PWM8 output is inverted.
Polarity select bit for outputs PWM0 to PWM3. When P7LVL = 0; the PWM outputs are
not inverted. When P8LVL = 1; the PWM outputs are inverted.
Polarity select bit for outputs PWM4 to PWM7. When P6LVL = 0; the PWM outputs are
not inverted. When P6LVL = 1; the PWM outputs are inverted.
1
P7LVL
0
P6LVL
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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