參數(shù)資料
型號: PCA9671
廠商: NXP Semiconductors N.V.
英文描述: Remote 16-bit I/O expander for Fm+ I2C-bus with reset
中文描述: 遠(yuǎn)程16位I / O擴(kuò)展調(diào)頻的I2C總線與復(fù)位
文件頁數(shù): 18/34頁
文件大小: 183K
代理商: PCA9671
PCA9671_1
NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 20 December 2006
18 of 34
NXP Semiconductors
PCA9671
Remote 16-bit I/O expander for Fm+ I
2
C-bus with reset
10. Application design-in information
10.1 Bidirectional I/O expander applications
In the 8-bit I/O expander application shown in
Figure 23
, P00 and P01 are inputs, and P02
to P07 are outputs. When used in this configuration, during a write, the input (P00 and
P01) must be written as HIGH so the external devices fully control the input ports. The
desired HIGH or LOW logic levels may be written to the I/Os used as outputs (P02 to
P07). During a read, the logic levels of the external devices driving the input ports (P00
and P01) and the previous written logic level to the output ports (P02 to P07) will be read.
The GPIO also has a reset line (RESET) that can be connected to an output pin of the
microprocessor. Since the device does not have an interrupt output, changes of the I/Os
can be monitored by reading the input registers. If both a RESET and INT are needed,
use the PCA9673.
Fig 22. Acknowledgement on the I
2
C-bus
002aaa987
S
START
condition
9
8
2
1
clock pulse for
acknowledgement
not acknowledge
acknowledge
data output
by transmitter
data output
by receiver
SCL from master
Fig 23. Bidirectional I/O expander application
002aac253
V
DD
temperature sensor
battery status
control for latch
control for switch
control for audio
control for camera
control for MP3
P00
P01
P02
P03
P04
P05
P06
P07
V
DD
SDA
SCL
RESET
A0
A1
A2
CORE
PROCESSOR
V
DD
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