參數(shù)資料
型號(hào): PCA9671
廠(chǎng)商: NXP Semiconductors N.V.
英文描述: Remote 16-bit I/O expander for Fm+ I2C-bus with reset
中文描述: 遠(yuǎn)程16位I / O擴(kuò)展調(diào)頻的I2C總線(xiàn)與復(fù)位
文件頁(yè)數(shù): 17/34頁(yè)
文件大小: 183K
代理商: PCA9671
PCA9671_1
NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 20 December 2006
17 of 34
NXP Semiconductors
PCA9671
Remote 16-bit I/O expander for Fm+ I
2
C-bus with reset
9.2 System configuration
A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. The
device that controls the message is the ‘master’ and the devices which are controlled by
the master are the ‘slaves’ (see
Figure 21
).
9.3 Acknowledge
The number of data bytes transferred between the START and the STOP conditions from
transmitter to receiver is not limited. Each byte of eight bits is followed by one
acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter,
whereas the master generates an extra acknowledge related clock pulse.
A slave receiver which is addressed must generate an acknowledge after the reception of
each byte. Also a master must generate an acknowledge after the reception of each byte
that has been clocked out of the slave transmitter. The device that acknowledges has to
pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable
LOW during the HIGH period of the acknowledge related clock pulse; set-up and hold
times must be taken into account.
A master receiver must signal an end of data to the transmitter by not generating an
acknowledge on the last byte that has been clocked out of the slave. In this event, the
transmitter must leave the data line HIGH to enable the master to generate a STOP
condition.
Fig 20. Definition of START and STOP conditions
mba608
SDA
SCL
P
STOP condition
SDA
SCL
S
START condition
Fig 21. System configuration
002aaa966
MASTER
TRANSMITTER/
RECEIVER
SLAVE
RECEIVER
SLAVE
TRANSMITTER/
RECEIVER
MASTER
TRANSMITTER
MASTER
TRANSMITTER/
RECEIVER
SDA
SCL
I
2
C-BUS
MULTIPLEXER
SLAVE
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