參數(shù)資料
型號(hào)： PCA9574PW,112
廠商： NXP Semiconductors
文件頁數(shù)： 4/33頁
文件大?。?/td> 0K
描述： IC I/O EXPANDER I2C 8B 16TSSOP
標(biāo)準(zhǔn)包裝： 96
接口： I²C，SM 總線
輸入/輸出數(shù)： 8
中斷輸出： 是
頻率 - 時(shí)鐘： 400kHz
電源電壓： 1.1 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 16-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 16-TSSOP
包裝： 帶卷 (TR)
包括： POR
其它名稱： 935285149112
PCA9574PW
PCA9574PW-ND
PCA9574
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 25 April 2012
12 of 33
NXP Semiconductors
PCA9574
8-bit I2C-bus and SMBus, level translating, low volage GPIO
7.5.8 Register 7 - Interrupt status register
This register is read-only. It is used to identify the source of interrupt.
Remark: If the interrupts are masked, this register will return all zeros.
7.6 Power-on reset
When power is applied to VDD, an internal Power-On Reset (POR) holds the PCA9574 in
a reset condition until VDD has reached VPOR. At that point, the reset condition is released
and the PCA9574 registers and state machine will initialize to their default states. The
power-on reset typically completes the reset and enables the part by the time the power
supply is above VPOR. However, when it is required to reset the part by lowering the power
supply, it is necessary to lower it below 0.2 V.
7.7 RESET input
A reset can be accomplished by holding the RESET pin LOW for a minimum of tw(rst). The
PCA9574 registers and I2C-bus state machine will be held in their default state until the
RESET input is once again HIGH.
7.8 Software reset
The Software Reset Call allows all the devices in the I2C-bus to be reset to the power-up
state value through a specific formatted I2C-bus command. To be performed correctly, it
implies that the I2C-bus is functional and that there is no device hanging the bus.
The Software Reset sequence is defined as following:
1. A START command is sent by the I2C-bus master.
2. The reserved General Call I2C-bus address ‘0000 000’ with the R/W bit set to 0 (write)
is sent by the I2C-bus master.
3. The PCA9574 device(s) acknowledge(s) after seeing the General Call address
‘0000 0000’ (00h) only. If the R/W bit is set to logic 1 (read), no acknowledge is
returned to the I2C-bus master.
4. Once the General Call address has been sent and acknowledged, the master sends
1 byte. The value of the byte must be equal to 06h.The PCA9574 acknowledges this
value only. If the byte is not equal to 06h, the PCA9574 does not acknowledge it. If
more than 1 byte of data is sent, the PCA9574 does not acknowledge anymore.
Table 12.
Register 7 - Interrupt status register (address 07h) bit description
Legend: * default value.
Bit
Symbol
Access
Value
Description
7
S0.7
read only
0*
identifies source of interrupt
6
S0.6
read only
0*
5
S0.5
read only
0*
4
S0.4
read only
0*
3
S0.3
read only
0*
2
S0.2
read only
0*
1
S0.1
read only
0*
0
S0.0
read only
0*
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