參數(shù)資料
型號: PCA9574PW,112
廠商: NXP Semiconductors
文件頁數(shù): 3/33頁
文件大?。?/td> 0K
描述: IC I/O EXPANDER I2C 8B 16TSSOP
標(biāo)準(zhǔn)包裝: 96
接口: I²C,SM 總線
輸入/輸出數(shù): 8
中斷輸出:
頻率 - 時(shí)鐘: 400kHz
電源電壓: 1.1 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 帶卷 (TR)
包括: POR
其它名稱: 935285149112
PCA9574PW
PCA9574PW-ND
PCA9574
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 25 April 2012
11 of 33
NXP Semiconductors
PCA9574
8-bit I2C-bus and SMBus, level translating, low volage GPIO
7.5.6 Register 5 - Output port register
This register is an output-only port. It reflects the outgoing logic levels of the pins defined
as outputs by Register 4. Bit values in this register have no effect on pins defined as
inputs. In turn, reads from this register reflect the value that is in the flip-flop controlling the
output selection, not the actual pin value.
7.5.7 Register 6 - Interrupt mask register
All the bits of Interrupt mask register are set to logic 1 upon power-on or software reset,
thus disabling interrupts. Interrupts may be enabled by setting corresponding mask bits to
logic 0.
Table 10.
Register 5 - Output port register (address 05h) bit description
Legend: * default value.
Bit
Symbol
Access
Value
Description
7
O0.7
R/W
0*
reflects outgoing logic levels of pins defined as
outputs by Register 4
6O0.6
R/W
0*
5O0.5
R/W
0*
4O0.4
R/W
0*
3O0.3
R/W
0*
2O0.2
R/W
0*
1O0.1
R/W
0*
0O0.0
R/W
0*
Table 11.
Register 6 - Interrupt mask register (address 06h) bit description
Legend: * default value.
Bit
Symbol
Access
Value
Description
7
M0.7
R/W
1*
enable or disable interrupts
0 = enable interrupt
1 = disable interrupt (default value)
6M0.6
R/W
1*
5M0.5
R/W
1*
4M0.4
R/W
1*
3M0.3
R/W
1*
2M0.2
R/W
1*
1M0.1
R/W
1*
0M0.0
R/W
1*
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